2008-03-17 03:21:36 +00:00
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//===-- SparcISelLowering.h - Sparc DAG Lowering Interface ------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the interfaces that Sparc uses to lower LLVM code into a
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// selection DAG.
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//
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//===----------------------------------------------------------------------===//
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#ifndef SPARC_ISELLOWERING_H
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#define SPARC_ISELLOWERING_H
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#include "Sparc.h"
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2012-03-17 18:46:09 +00:00
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#include "llvm/Target/TargetLowering.h"
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2008-03-17 03:21:36 +00:00
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namespace llvm {
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class SparcSubtarget;
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namespace SPISD {
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enum {
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FIRST_NUMBER = ISD::BUILTIN_OP_END,
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CMPICC, // Compare two GPR operands, set icc+xcc.
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CMPFCC, // Compare two FP operands, set fcc.
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BRICC, // Branch to dest on icc condition
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BRXCC, // Branch to dest on xcc condition (64-bit only).
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BRFCC, // Branch to dest on fcc condition
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SELECT_ICC, // Select between two values using the current ICC flags.
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2013-04-04 03:08:00 +00:00
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SELECT_XCC, // Select between two values using the current XCC flags.
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SELECT_FCC, // Select between two values using the current FCC flags.
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2008-10-10 20:28:10 +00:00
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Hi, Lo, // Hi/Lo operations, typically on a global address.
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FTOI, // FP to Int within a FP register.
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ITOF, // Int to FP within a FP register.
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FTOX, // FP to Int64 within a FP register.
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XTOF, // Int64 to FP within a FP register.
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CALL, // A call instruction.
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RET_FLAG, // Return with a flag operand.
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GLOBAL_BASE_REG, // Global base reg for PIC.
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FLUSHW, // FLUSH register windows to stack.
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TLS_ADD, // For Thread Local Storage (TLS).
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TLS_LD,
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TLS_CALL
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2008-03-17 03:21:36 +00:00
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};
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}
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class SparcTargetLowering : public TargetLowering {
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const SparcSubtarget *Subtarget;
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public:
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SparcTargetLowering(TargetMachine &TM);
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SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
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2008-10-10 20:28:10 +00:00
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2014-05-14 21:14:37 +00:00
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/// computeKnownBitsForTargetNode - Determine which of the bits specified
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/// in Mask are known to be either zero or one and return them in the
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/// KnownZero/KnownOne bitsets.
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void computeKnownBitsForTargetNode(const SDValue Op,
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APInt &KnownZero,
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APInt &KnownOne,
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const SelectionDAG &DAG,
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unsigned Depth = 0) const override;
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MachineBasicBlock *
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2010-05-01 00:01:06 +00:00
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EmitInstrWithCustomInserter(MachineInstr *MI,
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MachineBasicBlock *MBB) const override;
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2008-10-10 20:28:10 +00:00
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2014-04-29 07:57:13 +00:00
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const char *getTargetNodeName(unsigned Opcode) const override;
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2008-10-10 20:28:10 +00:00
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2014-04-29 07:57:13 +00:00
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ConstraintType getConstraintType(const std::string &Constraint) const override;
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2014-01-22 01:29:51 +00:00
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ConstraintWeight
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getSingleConstraintMatchWeight(AsmOperandInfo &info,
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const char *constraint) const override;
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2014-01-22 01:29:51 +00:00
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void LowerAsmOperandForConstraint(SDValue Op,
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std::string &Constraint,
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std::vector<SDValue> &Ops,
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SelectionDAG &DAG) const override;
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2008-10-10 20:28:10 +00:00
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std::pair<unsigned, const TargetRegisterClass*>
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2014-04-29 07:57:13 +00:00
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getRegForInlineAsmConstraint(const std::string &Constraint, MVT VT) const override;
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Teach DAGCombine to fold constant offsets into GlobalAddress nodes,
and add a TargetLowering hook for it to use to determine when this
is legal (i.e. not in PIC mode, etc.)
This allows instruction selection to emit folded constant offsets
in more cases, such as the included testcase, eliminating the need
for explicit arithmetic instructions.
This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp
that attempted to achieve the same effect, but wasn't as effective.
Also, fix handling of offsets in GlobalAddressSDNodes in several
places, including changing GlobalAddressSDNode's offset from
int to int64_t.
The Mips, Alpha, Sparc, and CellSPU targets appear to be
unaware of GlobalAddress offsets currently, so set the hook to
false on those targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-18 02:06:02 +00:00
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2014-04-29 07:57:13 +00:00
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bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override;
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MVT getScalarShiftAmountTy(EVT LHSTy) const override { return MVT::i32; }
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2009-06-30 22:38:32 +00:00
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2013-12-09 04:02:15 +00:00
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/// getSetCCResultType - Return the ISD::SETCC ValueType
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2014-04-29 07:57:13 +00:00
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EVT getSetCCResultType(LLVMContext &Context, EVT VT) const override;
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2013-12-09 04:02:15 +00:00
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2014-04-29 07:57:13 +00:00
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SDValue
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Major calling convention code refactoring.
Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.
This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.
This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78142 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 01:29:28 +00:00
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LowerFormalArguments(SDValue Chain,
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2009-09-02 08:44:58 +00:00
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CallingConv::ID CallConv,
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Major calling convention code refactoring.
Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.
This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.
This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78142 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 01:29:28 +00:00
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bool isVarArg,
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const SmallVectorImpl<ISD::InputArg> &Ins,
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2013-05-25 02:42:55 +00:00
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SDLoc dl, SelectionDAG &DAG,
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2014-04-29 07:57:13 +00:00
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SmallVectorImpl<SDValue> &InVals) const override;
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2013-04-02 04:09:02 +00:00
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SDValue LowerFormalArguments_32(SDValue Chain,
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CallingConv::ID CallConv,
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bool isVarArg,
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const SmallVectorImpl<ISD::InputArg> &Ins,
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2013-05-25 02:42:55 +00:00
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SDLoc dl, SelectionDAG &DAG,
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2013-04-02 04:09:02 +00:00
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SmallVectorImpl<SDValue> &InVals) const;
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SDValue LowerFormalArguments_64(SDValue Chain,
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CallingConv::ID CallConv,
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bool isVarArg,
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const SmallVectorImpl<ISD::InputArg> &Ins,
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2013-05-25 02:42:55 +00:00
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SDLoc dl, SelectionDAG &DAG,
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2013-04-02 04:09:02 +00:00
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SmallVectorImpl<SDValue> &InVals) const;
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Major calling convention code refactoring.
Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.
This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.
This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78142 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 01:29:28 +00:00
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2014-04-29 07:57:13 +00:00
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SDValue
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2012-05-25 16:35:28 +00:00
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LowerCall(TargetLowering::CallLoweringInfo &CLI,
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2014-04-29 07:57:13 +00:00
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SmallVectorImpl<SDValue> &InVals) const override;
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2013-04-07 19:10:57 +00:00
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SDValue LowerCall_32(TargetLowering::CallLoweringInfo &CLI,
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SmallVectorImpl<SDValue> &InVals) const;
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SDValue LowerCall_64(TargetLowering::CallLoweringInfo &CLI,
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SmallVectorImpl<SDValue> &InVals) const;
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Major calling convention code refactoring.
Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.
This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.
This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78142 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 01:29:28 +00:00
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2014-04-29 07:57:13 +00:00
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SDValue
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Major calling convention code refactoring.
Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.
This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.
This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78142 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 01:29:28 +00:00
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LowerReturn(SDValue Chain,
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2009-09-02 08:44:58 +00:00
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CallingConv::ID CallConv, bool isVarArg,
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Major calling convention code refactoring.
Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.
This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.
This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78142 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 01:29:28 +00:00
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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2010-07-07 15:54:55 +00:00
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const SmallVectorImpl<SDValue> &OutVals,
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2014-04-29 07:57:13 +00:00
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SDLoc dl, SelectionDAG &DAG) const override;
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2013-04-06 23:57:33 +00:00
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SDValue LowerReturn_32(SDValue Chain,
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CallingConv::ID CallConv, bool IsVarArg,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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const SmallVectorImpl<SDValue> &OutVals,
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2013-05-25 02:42:55 +00:00
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SDLoc DL, SelectionDAG &DAG) const;
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2013-04-06 23:57:33 +00:00
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SDValue LowerReturn_64(SDValue Chain,
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CallingConv::ID CallConv, bool IsVarArg,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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const SmallVectorImpl<SDValue> &OutVals,
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2013-05-25 02:42:55 +00:00
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SDLoc DL, SelectionDAG &DAG) const;
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2009-09-15 17:46:24 +00:00
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2010-04-17 15:26:15 +00:00
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SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
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2013-09-22 06:48:52 +00:00
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SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const;
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2010-04-17 15:26:15 +00:00
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SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
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2013-06-03 05:58:33 +00:00
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SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
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2011-02-21 03:42:44 +00:00
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unsigned getSRetArgSize(SelectionDAG &DAG, SDValue Callee) const;
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2013-04-14 01:33:32 +00:00
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SDValue withTargetFlags(SDValue Op, unsigned TF, SelectionDAG &DAG) const;
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SDValue makeHiLoPair(SDValue Op, unsigned HiTF, unsigned LoTF,
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SelectionDAG &DAG) const;
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2013-04-14 04:35:16 +00:00
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SDValue makeAddress(SDValue Op, SelectionDAG &DAG) const;
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2013-09-03 04:11:59 +00:00
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SDValue LowerF128_LibCallArg(SDValue Chain, ArgListTy &Args,
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SDValue Arg, SDLoc DL,
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SelectionDAG &DAG) const;
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SDValue LowerF128Op(SDValue Op, SelectionDAG &DAG,
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const char *LibFuncName,
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unsigned numArgs) const;
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SDValue LowerF128Compare(SDValue LHS, SDValue RHS,
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unsigned &SPCC,
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SDLoc DL,
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SelectionDAG &DAG) const;
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2014-04-29 07:57:13 +00:00
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bool ShouldShrinkFPConstant(EVT VT) const override {
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2013-09-03 04:11:59 +00:00
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// Do not shrink FP constpool if VT == MVT::f128.
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// (ldd, call _Q_fdtoq) is more expensive than two ldds.
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return VT != MVT::f128;
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}
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2013-11-03 12:28:40 +00:00
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2014-04-29 07:57:13 +00:00
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void ReplaceNodeResults(SDNode *N,
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2013-11-03 12:28:40 +00:00
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SmallVectorImpl<SDValue>& Results,
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2014-04-29 07:57:13 +00:00
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SelectionDAG &DAG) const override;
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2014-01-24 06:23:31 +00:00
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MachineBasicBlock *expandSelectCC(MachineInstr *MI, MachineBasicBlock *BB,
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unsigned BROpcode) const;
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MachineBasicBlock *expandAtomicRMW(MachineInstr *MI,
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MachineBasicBlock *BB,
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unsigned Opcode,
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unsigned CondCode = 0) const;
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2008-03-17 03:21:36 +00:00
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};
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} // end namespace llvm
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#endif // SPARC_ISELLOWERING_H
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