llvm-6502/test/MC/Disassembler/X86/x86-32.txt

# RUN: llvm-mc --disassemble %s -triple=i686-apple-darwin9 | FileCheck %s

# Coverage

# CHECK: pushl
0xff 0x34 0x24

# CHECK: popl
0x58

# CHECK: calll
0xff 0xd0

# CHECK: incl
0x40

# CHECK: leave
0xc9

# PR8873: some instructions not recognized in 32-bit mode

# CHECK: fld
0xdd 0x04 0x24

# CHECK: pshufb
0x0f 0x38 0x00 0xc0

# CHECK: crc32b %al, %eax
0xf2 0x0f 0x38 0xf0 0xc0
Make the disassembler able to disassemble a bunch of instructions with names in the TableGen files containing "64" on x86-32. This includes a bunch of x87 instructions, like fld, and a bunch of SSSE3 instructions on MMX registers like pshufb. Part of PR8873. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135337 91177308-0d34-0410-b5e6-96231b3b80d8 2011-07-16 02:41:28 +00:00			`# RUN: llvm-mc --disassemble %s -triple=i686-apple-darwin9 \| FileCheck %s`

			`# Coverage`

			`# CHECK: pushl`
			`0xff 0x34 0x24`

			`# CHECK: popl`
			`0x58`

			`# CHECK: calll`
			`0xff 0xd0`

			`# CHECK: incl`
			`0x40`

			`# CHECK: leave`
			`0xc9`

			`# PR8873: some instructions not recognized in 32-bit mode`

			`# CHECK: fld`
			`0xdd 0x04 0x24`

			`# CHECK: pshufb`
			`0x0f 0x38 0x00 0xc0`
Fix the disassembly of the X86 crc32 instruction. Bug 10702 and rdar://8795217 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138771 91177308-0d34-0410-b5e6-96231b3b80d8 2011-08-29 22:06:28 +00:00
			`# CHECK: crc32b %al, %eax`
			`0xf2 0x0f 0x38 0xf0 0xc0`