llvm-6502/test/CodeGen/Mips/fpneeded.ll

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This is for an experimental option -mips-os16. The idea is to compile all Mips32 code as Mips16 unless it can't be compiled as Mips 16. For now this would happen as long as floating point instructions are not needed. Probably it would also make sense to compile as mips32 if atomic operations are needed too. There may be other cases too. A module pass prescans the IR and adds the mips16 or nomips16 attribute to functions depending on the functions needs. Mips 16 mode can result in a 40% code compression by utililizing 16 bit encoding of many instructions. The hope is for this to replace the traditional gcc way of dealing with Mips16 code using floating point which involves essentially using soft float but with a library implemented using mips32 floating point. This gcc method also requires creating stubs so that Mips32 code can interact with these Mips 16 functions that have floating point needs. My conjecture is that in reality this traditional gcc method would never win over this new method. I will be implementing the traditional gcc method also. Some of it is already done but I needed to do the stubs to finish the work and those required this mips16/32 mixed mode capability. I have more ideas for to make this new method much better and I think the old method will just live in llvm for anyone that needs the backward compatibility but I don't for what reason that would be needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179185 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-10 16:58:04 +00:00
; RUN: llc -march=mipsel -mcpu=mips32 -relocation-model=static -O3 < %s -mips-os16 | FileCheck %s -check-prefix=32
@x = global float 1.000000e+00, align 4
@y = global float 2.000000e+00, align 4
@zz = common global float 0.000000e+00, align 4
@z = common global float 0.000000e+00, align 4
define float @fv() #0 {
entry:
ret float 1.000000e+00
}
; 32: .set nomips16 # @fv
; 32: .ent fv
; 32: .set noreorder
; 32: .set nomacro
; 32: .set noat
; 32: jr $ra
; 32: .set at
; 32: .set macro
; 32: .set reorder
; 32: .end fv
define double @dv() #0 {
entry:
ret double 2.000000e+00
}
; 32: .set nomips16 # @dv
; 32: .ent dv
; 32: .set noreorder
; 32: .set nomacro
; 32: .set noat
; 32: jr $ra
; 32: .set at
; 32: .set macro
; 32: .set reorder
; 32: .end dv
define void @vf(float %x) #0 {
entry:
%x.addr = alloca float, align 4
store float %x, float* %x.addr, align 4
ret void
}
; 32: .set nomips16 # @vf
; 32: .ent vf
; 32: .set noreorder
; 32: .set nomacro
; 32: .set noat
; 32: jr $ra
; 32: .set at
; 32: .set macro
; 32: .set reorder
; 32: .end vf
define void @vd(double %x) #0 {
entry:
%x.addr = alloca double, align 8
store double %x, double* %x.addr, align 8
ret void
}
; 32: .set nomips16 # @vd
; 32: .ent vd
; 32: .set noreorder
; 32: .set nomacro
; 32: .set noat
; 32: jr $ra
; 32: .set at
; 32: .set macro
; 32: .set reorder
; 32: .end vd
define void @foo1() #0 {
entry:
store float 1.000000e+00, float* @zz, align 4
%0 = load float* @y, align 4
%1 = load float* @x, align 4
%add = fadd float %0, %1
store float %add, float* @z, align 4
ret void
}
; 32: .set nomips16 # @foo1
; 32: .ent foo1
; 32: .set noreorder
; 32: .set nomacro
; 32: .set noat
; 32: jr $ra
; 32: .set at
; 32: .set macro
; 32: .set reorder
; 32: .end foo1
define void @foo2() #0 {
entry:
%0 = load float* @x, align 4
call void @vf(float %0)
ret void
}
; 32: .set nomips16 # @foo2
; 32: .ent foo2
; 32: .set noreorder
; 32: .set nomacro
; 32: .set noat
; 32: jr $ra
; 32: .set at
; 32: .set macro
; 32: .set reorder
; 32: .end foo2
define void @foo3() #0 {
entry:
%call = call float @fv()
store float %call, float* @x, align 4
ret void
}
; 32: .set nomips16 # @foo3
; 32: .ent foo3
; 32: .set noreorder
; 32: .set nomacro
; 32: .set noat
; 32: jr $ra
; 32: .set at
; 32: .set macro
; 32: .set reorder
; 32: .end foo3
attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
define void @vv() #0 {
entry:
ret void
}
; 32: .set mips16 # @vv
; 32: .ent vv
; 32: save {{.+}}
; 32: restore {{.+}}
; 32: .end vv