llvm-6502/test/MC/AArch64/noneon-diagnostics.s

// RUN: not llvm-mc  -triple aarch64-none-linux-gnu -mattr=-neon < %s 2> %t
// RUN: FileCheck --check-prefix=CHECK-ERROR < %t %s

        fmla v3.4s, v12.4s, v17.4s
        fmla v1.2d, v30.2d, v20.2d
        fmla v9.2s, v9.2s, v0.2s
// CHECK-ERROR: error: instruction requires a CPU feature not currently enabled
// CHECK-ERROR-NEXT:    fmla v3.4s, v12.4s, v17.4s
// CHECK-ERROR-NEXT:    ^
// CHECK-ERROR-NEXT: error: instruction requires a CPU feature not currently enabled
// CHECK-ERROR-NEXT:    fmla v1.2d, v30.2d, v20.2d
// CHECK-ERROR-NEXT:    ^
// CHECK-ERROR-NEXT: error: instruction requires a CPU feature not currently enabled
// CHECK-ERROR-NEXT:    fmla v9.2s, v9.2s, v0.2s
// CHECK-ERROR-NEXT:    ^

        fmls v3.4s, v12.4s, v17.4s
        fmls v1.2d, v30.2d, v20.2d
        fmls v9.2s, v9.2s, v0.2s
// CHECK-ERROR: error: instruction requires a CPU feature not currently enabled
// CHECK-ERROR-NEXT:    fmls v3.4s, v12.4s, v17.4s
// CHECK-ERROR-NEXT:    ^
// CHECK-ERROR-NEXT: error: instruction requires a CPU feature not currently enabled
// CHECK-ERROR-NEXT:    fmls v1.2d, v30.2d, v20.2d
// CHECK-ERROR-NEXT:    ^
// CHECK-ERROR-NEXT: error: instruction requires a CPU feature not currently enabled
// CHECK-ERROR-NEXT:    fmls v9.2s, v9.2s, v0.2s
// CHECK-ERROR-NEXT:    ^
AArch64: add initial NEON support Patch by Ana Pazos. - Completed implementation of instruction formats: AdvSIMD three same AdvSIMD modified immediate AdvSIMD scalar pairwise - Completed implementation of instruction classes (some of the instructions in these classes belong to yet unfinished instruction formats): Vector Arithmetic Vector Immediate Vector Pairwise Arithmetic - Initial implementation of instruction formats: AdvSIMD scalar two-reg misc AdvSIMD scalar three same - Intial implementation of instruction class: Scalar Arithmetic - Initial clang changes to support arm v8 intrinsics. Note: no clang changes for scalar intrinsics function name mangling yet. - Comprehensive test cases for added instructions To verify auto codegen, encoding, decoding, diagnosis, intrinsics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187567 91177308-0d34-0410-b5e6-96231b3b80d8 2013-08-01 09:20:35 +00:00			`// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=-neon < %s 2> %t`
			`// RUN: FileCheck --check-prefix=CHECK-ERROR < %t %s`

			`fmla v3.4s, v12.4s, v17.4s`
			`fmla v1.2d, v30.2d, v20.2d`
			`fmla v9.2s, v9.2s, v0.2s`
			`// CHECK-ERROR: error: instruction requires a CPU feature not currently enabled`
			`// CHECK-ERROR-NEXT: fmla v3.4s, v12.4s, v17.4s`
			`// CHECK-ERROR-NEXT: ^`
			`// CHECK-ERROR-NEXT: error: instruction requires a CPU feature not currently enabled`
			`// CHECK-ERROR-NEXT: fmla v1.2d, v30.2d, v20.2d`
			`// CHECK-ERROR-NEXT: ^`
			`// CHECK-ERROR-NEXT: error: instruction requires a CPU feature not currently enabled`
			`// CHECK-ERROR-NEXT: fmla v9.2s, v9.2s, v0.2s`
			`// CHECK-ERROR-NEXT: ^`

			`fmls v3.4s, v12.4s, v17.4s`
			`fmls v1.2d, v30.2d, v20.2d`
			`fmls v9.2s, v9.2s, v0.2s`
			`// CHECK-ERROR: error: instruction requires a CPU feature not currently enabled`
			`// CHECK-ERROR-NEXT: fmls v3.4s, v12.4s, v17.4s`
			`// CHECK-ERROR-NEXT: ^`
			`// CHECK-ERROR-NEXT: error: instruction requires a CPU feature not currently enabled`
			`// CHECK-ERROR-NEXT: fmls v1.2d, v30.2d, v20.2d`
			`// CHECK-ERROR-NEXT: ^`
			`// CHECK-ERROR-NEXT: error: instruction requires a CPU feature not currently enabled`
			`// CHECK-ERROR-NEXT: fmls v9.2s, v9.2s, v0.2s`
			`// CHECK-ERROR-NEXT: ^`