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llvm-6502/test/MC/ARM/arm-elf-relocation-diagnostics.s

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ARM: add support for segment base relocations (SBREL) This adds support for parsing and emitting the SBREL relocation variant for the ARM target. Handling this relocation variant is necessary for supporting the full ARM ELF specification. Addresses PR22128. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225595 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-11 04:39:18 +00:00
@ RUN: not llvm-mc -triple armv7-eabi -filetype obj -o - %s 2>&1 \
@ RUN: | FileCheck %s
@ RUN: not llvm-mc -triple thumbv7-eabi -filetype obj -o - %s 2>&1 \
@ RUN: | FileCheck %s
.byte target(sbrel)
@ CHECK: error: relocated expression must be 32-bit
@ CHECK: .byte target(sbrel)
@ CHECK: ^
@ TODO: enable these negative test cases
@ .hword target(sbrel)
@ @ CHECK-SBREL-HWORD: error: relocated expression must be 32-bit
@ @ CHECK-SBREL-HWORD: .hword target(sbrel)
@ @ CHECK-SBREL-HWORD: ^
@
@ .short target(sbrel)
@ @ CHECK-SBREL-SHORT: error: relocated expression must be 32-bit
@ @ CHECK-SBREL-SHORT: .short target(sbrel)
@ @ CHECK-SBREL-SHORT: ^
@
@ .quad target(sbrel)
@ @ CHECK-SBREL-SHORT: error: relocated expression must be 32-bit
@ @ CHECK-SBREL-SHORT: .quad target(sbrel)
@ @ CHECK-SBREL-SHORT: ^
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