llvm-6502/test/CodeGen/AArch64/named-reg-alloc.ll

; RUN: not llc < %s -mtriple=aarch64-linux-gnueabi 2>&1 | FileCheck %s
; arm64 has separate copy of this test

define i32 @get_stack() nounwind {
entry:
; FIXME: Include an allocatable-specific error message
; CHECK: Invalid register name global variable
	%sp = call i32 @llvm.read_register.i32(metadata !0)
  ret i32 %sp
}

declare i32 @llvm.read_register.i32(metadata) nounwind

!0 = metadata !{metadata !"x5\00"}
Implememting named register intrinsics This patch implements the infrastructure to use named register constructs in programs that need access to specific registers (bare metal, kernels, etc). So far, only the stack pointer is supported as a technology preview, but as it is, the intrinsic can already support all non-allocatable registers from any architecture. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208104 91177308-0d34-0410-b5e6-96231b3b80d8 2014-05-06 16:51:25 +00:00			`; RUN: not llc < %s -mtriple=aarch64-linux-gnueabi 2>&1 \| FileCheck %s`
AArch64/ARM64: put annotation in test It makes finding already covered tests much easier with "grep -L arm64". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208187 91177308-0d34-0410-b5e6-96231b3b80d8 2014-05-07 10:47:00 +00:00			`; arm64 has separate copy of this test`
Implememting named register intrinsics This patch implements the infrastructure to use named register constructs in programs that need access to specific registers (bare metal, kernels, etc). So far, only the stack pointer is supported as a technology preview, but as it is, the intrinsic can already support all non-allocatable registers from any architecture. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208104 91177308-0d34-0410-b5e6-96231b3b80d8 2014-05-06 16:51:25 +00:00
			`define i32 @get_stack() nounwind {`
			`entry:`
			`; FIXME: Include an allocatable-specific error message`
			`; CHECK: Invalid register name global variable`
			`%sp = call i32 @llvm.read_register.i32(metadata !0)`
			`ret i32 %sp`
			`}`

			`declare i32 @llvm.read_register.i32(metadata) nounwind`

			`!0 = metadata !{metadata !"x5\00"}`