llvm-6502/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll

; RUN: llc < %s -march=x86 -mattr=+cmov | FileCheck %s
; Both values were being zero extended.
@u = external global i8
@s = external global i8
define i32 @foo(i1 %cond) {
; CHECK: @foo
  %u_base = load i8* @u
  %u_val = zext i8 %u_base to i32
; CHECK: movzbl
; CHECK: movsbl
  %s_base = load i8* @s
  %s_val = sext i8 %s_base to i32
  %val = select i1 %cond, i32 %u_val, i32 %s_val
  ret i32 %val
}
Force cmov on test so block placement doesn't shuffle the code around. This made the test fail with -mcpu=generic (when building on a non-x86 host). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154926 91177308-0d34-0410-b5e6-96231b3b80d8 2012-04-17 13:55:23 +00:00			`; RUN: llc < %s -march=x86 -mattr=+cmov \| FileCheck %s`
The DAGCombiner was threading select over pairs of extending loads even if the extension types were not the same. The result was that if you fed a select with sext and zext loads, as in the testcase, then it would get turned into a zext (or sext) of the select, which is wrong in the cases when it should have been an sext (resp. zext). Reported and diagnosed by Sebastien Deldon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119728 91177308-0d34-0410-b5e6-96231b3b80d8 2010-11-18 20:05:18 +00:00			`; Both values were being zero extended.`
			`@u = external global i8`
			`@s = external global i8`
			`define i32 @foo(i1 %cond) {`
			`; CHECK: @foo`
			`%u_base = load i8* @u`
			`%u_val = zext i8 %u_base to i32`
			`; CHECK: movzbl`
			`; CHECK: movsbl`
			`%s_base = load i8* @s`
			`%s_val = sext i8 %s_base to i32`
			`%val = select i1 %cond, i32 %u_val, i32 %s_val`
			`ret i32 %val`
			`}`