llvm-6502/test/CodeGen/AArch64/arm64-icmp-opt.ll

; RUN: llc < %s -march=arm64 | FileCheck %s

; Optimize (x > -1) to (x >= 0) etc.
; Optimize (cmp (add / sub), 0): eliminate the subs used to update flag
;   for comparison only
; rdar://10233472

define i32 @t1(i64 %a) nounwind ssp {
entry:
; CHECK-LABEL: t1:
; CHECK-NOT: movn
; CHECK: cmp  x0, #0
; CHECK: cset w0, ge
  %cmp = icmp sgt i64 %a, -1
  %conv = zext i1 %cmp to i32
  ret i32 %conv
}
ARM64: initial backend import This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8 2014-03-29 10:18:08 +00:00			`; RUN: llc < %s -march=arm64 \| FileCheck %s`

			`; Optimize (x > -1) to (x >= 0) etc.`
			`; Optimize (cmp (add / sub), 0): eliminate the subs used to update flag`
			`; for comparison only`
			`; rdar://10233472`

			`define i32 @t1(i64 %a) nounwind ssp {`
			`entry:`
			`; CHECK-LABEL: t1:`
			`; CHECK-NOT: movn`
			`; CHECK: cmp x0, #0`
TableGen: use PrintMethods to print more aliases git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208607 91177308-0d34-0410-b5e6-96231b3b80d8 2014-05-12 18:04:06 +00:00			`; CHECK: cset w0, ge`
ARM64: initial backend import This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8 2014-03-29 10:18:08 +00:00			`%cmp = icmp sgt i64 %a, -1`
			`%conv = zext i1 %cmp to i32`
			`ret i32 %conv`
			`}`