llvm-6502/test/CodeGen/X86/sse-align-7.ll

; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
; CHECK:     movaps
; CHECK-NOT:     movaps

define void @bar(<2 x i64>* %p, <2 x i64> %x) nounwind {
  store <2 x i64> %x, <2 x i64>* %p
  ret void
}
test/CodeGen/X86: FileCheck-ize and add explicit -mtriple=x86_64-linux. They are useless to Win64 target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127732 91177308-0d34-0410-b5e6-96231b3b80d8 2011-03-16 13:52:38 +00:00			`; RUN: llc < %s -mtriple=x86_64-linux \| FileCheck %s`
			`; CHECK: movaps`
			`; CHECK-NOT: movaps`
Implement initial memory alignment awareness for SSE instructions. Vector loads and stores that have a specified alignment of less than 16 bytes now use instructions that support misaligned memory references. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40015 91177308-0d34-0410-b5e6-96231b3b80d8 2007-07-18 20:23:34 +00:00
Add nounwind. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50837 91177308-0d34-0410-b5e6-96231b3b80d8 2008-05-07 22:59:08 +00:00			`define void @bar(<2 x i64>* %p, <2 x i64> %x) nounwind {`
Implement initial memory alignment awareness for SSE instructions. Vector loads and stores that have a specified alignment of less than 16 bytes now use instructions that support misaligned memory references. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40015 91177308-0d34-0410-b5e6-96231b3b80d8 2007-07-18 20:23:34 +00:00			`store <2 x i64> %x, <2 x i64>* %p`
			`ret void`
			`}`