2010-06-18 23:11:35 +00:00
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//===-- Thumb2HazardRecognizer.cpp - Thumb2 postra hazard recognizer ------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "ARM.h"
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#include "Thumb2HazardRecognizer.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/ScheduleDAG.h"
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using namespace llvm;
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ScheduleHazardRecognizer::HazardType
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Thumb2HazardRecognizer::getHazardType(SUnit *SU) {
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if (ITBlockSize) {
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MachineInstr *MI = SU->getInstr();
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2010-06-19 02:36:21 +00:00
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if (!MI->isDebugValue() && MI != ITBlockMIs[ITBlockSize-1])
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2010-06-18 23:11:35 +00:00
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return Hazard;
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}
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return PostRAHazardRecognizer::getHazardType(SU);
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}
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void Thumb2HazardRecognizer::Reset() {
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ITBlockSize = 0;
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PostRAHazardRecognizer::Reset();
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}
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void Thumb2HazardRecognizer::EmitInstruction(SUnit *SU) {
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MachineInstr *MI = SU->getInstr();
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unsigned Opcode = MI->getOpcode();
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if (ITBlockSize) {
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--ITBlockSize;
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} else if (Opcode == ARM::t2IT) {
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unsigned Mask = MI->getOperand(1).getImm();
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unsigned NumTZ = CountTrailingZeros_32(Mask);
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assert(NumTZ <= 3 && "Invalid IT mask!");
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ITBlockSize = 4 - NumTZ;
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MachineBasicBlock::iterator I = MI;
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for (unsigned i = 0; i < ITBlockSize; ++i) {
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++I;
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2010-06-19 02:36:21 +00:00
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while (I->isDebugValue())
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++I;
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2010-06-18 23:11:35 +00:00
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ITBlockMIs[ITBlockSize-1-i] = &*I;
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}
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}
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PostRAHazardRecognizer::EmitInstruction(SU);
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}
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