llvm-6502/lib/Target/PowerPC/Makefile

##===- lib/Target/PowerPC/Makefile -------------------------*- Makefile -*-===##
#
#                     The LLVM Compiler Infrastructure
#
# This file is distributed under the University of Illinois Open Source
# License. See LICENSE.TXT for details.
#
##===----------------------------------------------------------------------===##

LEVEL = ../../..
LIBRARYNAME = LLVMPowerPCCodeGen
TARGET = PPC

# Make sure that tblgen is run, first thing.
BUILT_SOURCES = PPCGenRegisterInfo.inc PPCGenAsmMatcher.inc \
                PPCGenAsmWriter.inc  \
                PPCGenInstrInfo.inc PPCGenDAGISel.inc \
                PPCGenSubtargetInfo.inc PPCGenCallingConv.inc \
                PPCGenMCCodeEmitter.inc PPCGenFastISel.inc \
                PPCGenDisassemblerTables.inc

DIRS = AsmParser Disassembler InstPrinter TargetInfo MCTargetDesc

include $(LEVEL)/Makefile.common
Initial revision git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14283 91177308-0d34-0410-b5e6-96231b3b80d8 2004-06-21 16:55:25 +00:00			`##===- lib/Target/PowerPC/Makefile -------------------------- Makefile --===##`
Removed trailing whitespace from Makefiles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61991 91177308-0d34-0410-b5e6-96231b3b80d8 2009-01-09 16:44:42 +00:00			`#`
Initial revision git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14283 91177308-0d34-0410-b5e6-96231b3b80d8 2004-06-21 16:55:25 +00:00			`# The LLVM Compiler Infrastructure`
			`#`
remove attribution from lib Makefiles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45415 91177308-0d34-0410-b5e6-96231b3b80d8 2007-12-29 20:09:26 +00:00			`# This file is distributed under the University of Illinois Open Source`
			`# License. See LICENSE.TXT for details.`
Removed trailing whitespace from Makefiles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61991 91177308-0d34-0410-b5e6-96231b3b80d8 2009-01-09 16:44:42 +00:00			`#`
Initial revision git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14283 91177308-0d34-0410-b5e6-96231b3b80d8 2004-06-21 16:55:25 +00:00			`##===----------------------------------------------------------------------===##`
Stop building RTTI information for most llvm libraries. Notable missing ones are libsupport, libsystem and libvmcore. libvmcore is currently blocked on bugpoint, which uses EH. Once it stops using EH, we can switch it off. This #if 0's out 3 unit tests, because gtest requires RTTI information. Suggestions welcome on how to fix this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94164 91177308-0d34-0410-b5e6-96231b3b80d8 2010-01-22 06:49:46 +00:00
Initial revision git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14283 91177308-0d34-0410-b5e6-96231b3b80d8 2004-06-21 16:55:25 +00:00			`LEVEL = ../../..`
Use correct name for PPC codegen library git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54888 91177308-0d34-0410-b5e6-96231b3b80d8 2008-08-17 13:54:44 +00:00			`LIBRARYNAME = LLVMPowerPCCodeGen`
Eliminate PowerPC.td and PPC32.td, consolidating them into PPC.td git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23738 91177308-0d34-0410-b5e6-96231b3b80d8 2005-10-14 23:37:35 +00:00			`TARGET = PPC`
Simplify makefile by combining all TableGen dependencies into one variable git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15527 91177308-0d34-0410-b5e6-96231b3b80d8 2004-08-05 18:34:15 +00:00
Initial revision git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14283 91177308-0d34-0410-b5e6-96231b3b80d8 2004-06-21 16:55:25 +00:00			`# Make sure that tblgen is run, first thing.`
[PowerPC] Add assembler parser This adds assembler parser support to the PowerPC back end. The parser will run for any powerpc-- and powerpc64-- triples, but was tested only on 64-bit Linux. The supported syntax is intended to be compatible with the GNU assembler. The parser does not yet support all PowerPC instructions, but it does support anything that is generated by LLVM itself. There is no support for testing restricted instruction sets yet, i.e. the parser will always accept any instructions it knows, no matter what feature flags are given. Instruction operands will be checked for validity and errors generated. (Error handling in general could still be improved.) The patch adds a number of test cases to verify instruction and operand encodings. The tests currently cover all instructions from the following PowerPC ISA v2.06 Book I facilities: Branch, Fixed-point, Floating-Point, and Vector. Note that a number of these instructions are not yet supported by the back end; they are marked with FIXME. A number of follow-on check-ins will add extra features. When they are all included, LLVM passes all tests (including bootstrap) when using clang -cc1as as the system assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181050 91177308-0d34-0410-b5e6-96231b3b80d8 2013-05-03 19:49:39 +00:00			`BUILT_SOURCES = PPCGenRegisterInfo.inc PPCGenAsmMatcher.inc \`
Reinstate "Nuke the old JIT." Approved by Jim Grosbach, Lang Hames, Rafael Espindola. This reinstates commits r215111, 215115, 215116, 215117, 215136. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216982 91177308-0d34-0410-b5e6-96231b3b80d8 2014-09-02 22:28:02 +00:00			`PPCGenAsmWriter.inc \`
Switch PPC return lower to use an autogenerated CC description. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34940 91177308-0d34-0410-b5e6-96231b3b80d8 2007-03-06 00:59:59 +00:00			`PPCGenInstrInfo.inc PPCGenDAGISel.inc \`
Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134281 91177308-0d34-0410-b5e6-96231b3b80d8 2011-07-01 22:36:09 +00:00			`PPCGenSubtargetInfo.inc PPCGenCallingConv.inc \`
Add a disassembler to the PowerPC backend The tests for the disassembler were adapted from the encoder tests, and for the most part, the output from the disassembler matches that encoder-test inputs. There are some places where more-informative mnemonics could be produced (notably for the branch instructions), and those cases are noted in the tests with FIXMEs. Future work includes: - Generating more-informative mnemonics when possible (this may also be done in the printer). - Remove the dependence on positional "numbered" operand-to-variable mapping (for both encoding and decoding). - Internally using 64-bit instruction variants in 64-bit mode (if this turns out to matter). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197693 91177308-0d34-0410-b5e6-96231b3b80d8 2013-12-19 16:13:01 +00:00			`PPCGenMCCodeEmitter.inc PPCGenFastISel.inc \`
			`PPCGenDisassemblerTables.inc`
Initial revision git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14283 91177308-0d34-0410-b5e6-96231b3b80d8 2004-06-21 16:55:25 +00:00
Add a disassembler to the PowerPC backend The tests for the disassembler were adapted from the encoder tests, and for the most part, the output from the disassembler matches that encoder-test inputs. There are some places where more-informative mnemonics could be produced (notably for the branch instructions), and those cases are noted in the tests with FIXMEs. Future work includes: - Generating more-informative mnemonics when possible (this may also be done in the printer). - Remove the dependence on positional "numbered" operand-to-variable mapping (for both encoding and decoding). - Internally using 64-bit instruction variants in 64-bit mode (if this turns out to matter). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197693 91177308-0d34-0410-b5e6-96231b3b80d8 2013-12-19 16:13:01 +00:00			`DIRS = AsmParser Disassembler InstPrinter TargetInfo MCTargetDesc`
Factor out asmprinter out of ppc git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54887 91177308-0d34-0410-b5e6-96231b3b80d8 2008-08-17 13:54:28 +00:00
Adjust to changes in Makefile.rules git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17167 91177308-0d34-0410-b5e6-96231b3b80d8 2004-10-22 21:02:08 +00:00			`include $(LEVEL)/Makefile.common`