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llvm-6502/test/CodeGen/Mips/cconv/arguments-hard-fp128.ll

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Move the Mips target to storing the ABI in the TargetMachine rather than on MipsSubtargetInfo. This required a bit of massaging in the MC level to handle this since MC is a) largely a collection of disparate classes with no hierarchy, and b) there's no overarching equivalent to the TargetMachine, instead only the subtarget via MCSubtargetInfo (which is the base class of TargetSubtargetInfo). We're now storing the ABI in both the TargetMachine level and in the MC level because the AsmParser and the TargetStreamer both need to know what ABI we have to parse assembly and emit objects. The target streamer has a pointer to the one in the asm parser and is updated when the asm parser is created. This is fragile as the FIXME comment notes, but shouldn't be a problem in practice since we always create an asm parser before attempting to emit object code via the assembler. The TargetMachine now contains the ABI so that the DataLayout can be constructed dependent upon ABI. All testcases have been updated to use the -target-abi command line flag so that we can set the ABI without using a subtarget feature. Should be no change visible externally here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227102 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 17:33:46 +00:00
; RUN: llc -march=mips64 -relocation-model=static -target-abi n32 < %s | FileCheck --check-prefix=ALL --check-prefix=SYM32 %s
; RUN: llc -march=mips64el -relocation-model=static -target-abi n32 < %s | FileCheck --check-prefix=ALL --check-prefix=SYM32 %s
[mips] Add calling convention tests covering O32, N32, and N64. Summary: I had difficulty finding tests for the N32 and N64 ABI so I've added a collection of calling convention tests based on the document MIPS ABIs Described (MD00305), the MIPSpro N32 Handbook, and the SYSV ABI. Where the documents/implementations disagree, I've used GCC to resolve the conflict. A few interesting details: * For N32, LLVM uses 64-bit pointers when saving $ra despite pointers being 32-bit. I've yet to find a supporting statement in the ABI documentation but the current behaviour matches GCC. * For O32, the non-variable portion of a varargs argument list is also subject to the rule that floating-point is passed via GPR's (on N32/N64 only the variable portion is subject to this rule). This agrees with GCC's behaviour and the SYSV ABI but contradicts part of the MIPSpro N32 Handbook which talks about O32's behaviour. * The N32 implementation has the wrong callee-saved register list. (I already have a fix for this but will commit it as a follow-up). I've left RUN-TODO lines in for O32 on MIPS64. I don't plan to support this case for now but we should revisit it. Reviewers: matheusalmeida, vmedic Reviewed By: matheusalmeida Differential Revision: http://reviews.llvm.org/D3339 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206370 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-16 09:59:46 +00:00
Move the Mips target to storing the ABI in the TargetMachine rather than on MipsSubtargetInfo. This required a bit of massaging in the MC level to handle this since MC is a) largely a collection of disparate classes with no hierarchy, and b) there's no overarching equivalent to the TargetMachine, instead only the subtarget via MCSubtargetInfo (which is the base class of TargetSubtargetInfo). We're now storing the ABI in both the TargetMachine level and in the MC level because the AsmParser and the TargetStreamer both need to know what ABI we have to parse assembly and emit objects. The target streamer has a pointer to the one in the asm parser and is updated when the asm parser is created. This is fragile as the FIXME comment notes, but shouldn't be a problem in practice since we always create an asm parser before attempting to emit object code via the assembler. The TargetMachine now contains the ABI so that the DataLayout can be constructed dependent upon ABI. All testcases have been updated to use the -target-abi command line flag so that we can set the ABI without using a subtarget feature. Should be no change visible externally here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227102 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 17:33:46 +00:00
; RUN: llc -march=mips64 -relocation-model=static -target-abi n64 < %s | FileCheck --check-prefix=ALL --check-prefix=SYM64 %s
; RUN: llc -march=mips64el -relocation-model=static -target-abi n64 < %s | FileCheck --check-prefix=ALL --check-prefix=SYM64 %s
[mips] Add calling convention tests covering O32, N32, and N64. Summary: I had difficulty finding tests for the N32 and N64 ABI so I've added a collection of calling convention tests based on the document MIPS ABIs Described (MD00305), the MIPSpro N32 Handbook, and the SYSV ABI. Where the documents/implementations disagree, I've used GCC to resolve the conflict. A few interesting details: * For N32, LLVM uses 64-bit pointers when saving $ra despite pointers being 32-bit. I've yet to find a supporting statement in the ABI documentation but the current behaviour matches GCC. * For O32, the non-variable portion of a varargs argument list is also subject to the rule that floating-point is passed via GPR's (on N32/N64 only the variable portion is subject to this rule). This agrees with GCC's behaviour and the SYSV ABI but contradicts part of the MIPSpro N32 Handbook which talks about O32's behaviour. * The N32 implementation has the wrong callee-saved register list. (I already have a fix for this but will commit it as a follow-up). I've left RUN-TODO lines in for O32 on MIPS64. I don't plan to support this case for now but we should revisit it. Reviewers: matheusalmeida, vmedic Reviewed By: matheusalmeida Differential Revision: http://reviews.llvm.org/D3339 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206370 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-16 09:59:46 +00:00
; Test the fp128 arguments for all ABI's and byte orders as specified
; by section 2 of the MIPSpro N32 Handbook.
;
; O32 is not tested because long double is the same as double on O32.
@ldoubles = global [11 x fp128] zeroinitializer
define void @ldouble_args(fp128 %a, fp128 %b, fp128 %c, fp128 %d, fp128 %e) nounwind {
entry:
%0 = getelementptr [11 x fp128]* @ldoubles, i32 0, i32 1
store volatile fp128 %a, fp128* %0
%1 = getelementptr [11 x fp128]* @ldoubles, i32 0, i32 2
store volatile fp128 %b, fp128* %1
%2 = getelementptr [11 x fp128]* @ldoubles, i32 0, i32 3
store volatile fp128 %c, fp128* %2
%3 = getelementptr [11 x fp128]* @ldoubles, i32 0, i32 4
store volatile fp128 %d, fp128* %3
%4 = getelementptr [11 x fp128]* @ldoubles, i32 0, i32 5
store volatile fp128 %e, fp128* %4
ret void
}
; ALL-LABEL: ldouble_args:
; We won't test the way the global address is calculated in this test. This is
; just to get the register number for the other checks.
; SYM32-DAG: addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(ldoubles)
; SYM64-DAG: ld [[R2:\$[0-9]]], %got_disp(ldoubles)(
; The first four arguments are the same in N32/N64.
; ALL-DAG: sdc1 $f12, 16([[R2]])
; ALL-DAG: sdc1 $f13, 24([[R2]])
; ALL-DAG: sdc1 $f14, 32([[R2]])
; ALL-DAG: sdc1 $f15, 40([[R2]])
; ALL-DAG: sdc1 $f16, 48([[R2]])
; ALL-DAG: sdc1 $f17, 56([[R2]])
; ALL-DAG: sdc1 $f18, 64([[R2]])
; ALL-DAG: sdc1 $f19, 72([[R2]])
; N32/N64 have run out of registers and starts using the stack too
; ALL-DAG: ld [[R3:\$[0-9]+]], 0($sp)
; ALL-DAG: ld [[R4:\$[0-9]+]], 8($sp)
; ALL-DAG: sd [[R3]], 80([[R2]])
; ALL-DAG: sd [[R4]], 88([[R2]])
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