2012-02-17 01:23:50 +00:00
|
|
|
//=== MipsInstPrinter.h - Convert Mips MCInst to assembly syntax -*- C++ -*-==//
|
2011-07-07 23:56:50 +00:00
|
|
|
//
|
|
|
|
// The LLVM Compiler Infrastructure
|
|
|
|
//
|
|
|
|
// This file is distributed under the University of Illinois Open Source
|
|
|
|
// License. See LICENSE.TXT for details.
|
|
|
|
//
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
//
|
|
|
|
// This class prints a Mips MCInst to a .s file.
|
|
|
|
//
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
|
|
|
|
#ifndef MIPSINSTPRINTER_H
|
|
|
|
#define MIPSINSTPRINTER_H
|
|
|
|
#include "llvm/MC/MCInstPrinter.h"
|
|
|
|
|
|
|
|
namespace llvm {
|
2012-06-02 10:20:22 +00:00
|
|
|
// These enumeration declarations were originally in MipsInstrInfo.h but
|
2011-07-07 23:56:50 +00:00
|
|
|
// had to be moved here to avoid circular dependencies between
|
2012-02-28 07:46:26 +00:00
|
|
|
// LLVMMipsCodeGen and LLVMMipsAsmPrinter.
|
2011-07-07 23:56:50 +00:00
|
|
|
namespace Mips {
|
|
|
|
// Mips Branch Codes
|
|
|
|
enum FPBranchCode {
|
|
|
|
BRANCH_F,
|
|
|
|
BRANCH_T,
|
|
|
|
BRANCH_FL,
|
|
|
|
BRANCH_TL,
|
|
|
|
BRANCH_INVALID
|
|
|
|
};
|
|
|
|
|
|
|
|
// Mips Condition Codes
|
|
|
|
enum CondCode {
|
|
|
|
// To be used with float branch True
|
|
|
|
FCOND_F,
|
|
|
|
FCOND_UN,
|
|
|
|
FCOND_OEQ,
|
|
|
|
FCOND_UEQ,
|
|
|
|
FCOND_OLT,
|
|
|
|
FCOND_ULT,
|
|
|
|
FCOND_OLE,
|
|
|
|
FCOND_ULE,
|
|
|
|
FCOND_SF,
|
|
|
|
FCOND_NGLE,
|
|
|
|
FCOND_SEQ,
|
|
|
|
FCOND_NGL,
|
|
|
|
FCOND_LT,
|
|
|
|
FCOND_NGE,
|
|
|
|
FCOND_LE,
|
|
|
|
FCOND_NGT,
|
|
|
|
|
|
|
|
// To be used with float branch False
|
|
|
|
// This conditions have the same mnemonic as the
|
|
|
|
// above ones, but are used with a branch False;
|
|
|
|
FCOND_T,
|
|
|
|
FCOND_OR,
|
|
|
|
FCOND_UNE,
|
|
|
|
FCOND_ONE,
|
|
|
|
FCOND_UGE,
|
|
|
|
FCOND_OGE,
|
|
|
|
FCOND_UGT,
|
|
|
|
FCOND_OGT,
|
|
|
|
FCOND_ST,
|
|
|
|
FCOND_GLE,
|
|
|
|
FCOND_SNE,
|
|
|
|
FCOND_GL,
|
|
|
|
FCOND_NLT,
|
|
|
|
FCOND_GE,
|
|
|
|
FCOND_NLE,
|
|
|
|
FCOND_GT
|
|
|
|
};
|
|
|
|
|
|
|
|
const char *MipsFCCToString(Mips::CondCode CC);
|
|
|
|
} // end namespace Mips
|
|
|
|
|
|
|
|
class TargetMachine;
|
|
|
|
|
|
|
|
class MipsInstPrinter : public MCInstPrinter {
|
|
|
|
public:
|
2012-04-02 06:09:36 +00:00
|
|
|
MipsInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
|
|
|
|
const MCRegisterInfo &MRI)
|
|
|
|
: MCInstPrinter(MAI, MII, MRI) {}
|
2012-02-28 07:46:26 +00:00
|
|
|
|
2011-07-07 23:56:50 +00:00
|
|
|
// Autogenerated by tblgen.
|
|
|
|
void printInstruction(const MCInst *MI, raw_ostream &O);
|
|
|
|
static const char *getRegisterName(unsigned RegNo);
|
2012-02-28 07:46:26 +00:00
|
|
|
|
2014-04-29 07:58:02 +00:00
|
|
|
void printRegName(raw_ostream &OS, unsigned RegNo) const override;
|
|
|
|
void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot) override;
|
2012-02-28 07:46:26 +00:00
|
|
|
|
2013-02-05 08:32:10 +00:00
|
|
|
bool printAliasInstr(const MCInst *MI, raw_ostream &OS);
|
2014-05-12 18:04:06 +00:00
|
|
|
void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
|
|
|
|
unsigned PrintMethodIdx, raw_ostream &O);
|
2013-02-05 08:32:10 +00:00
|
|
|
|
2011-07-07 23:56:50 +00:00
|
|
|
private:
|
|
|
|
void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
|
|
|
|
void printUnsignedImm(const MCInst *MI, int opNum, raw_ostream &O);
|
2013-09-27 11:48:57 +00:00
|
|
|
void printUnsignedImm8(const MCInst *MI, int opNum, raw_ostream &O);
|
2011-07-07 23:56:50 +00:00
|
|
|
void printMemOperand(const MCInst *MI, int opNum, raw_ostream &O);
|
|
|
|
void printMemOperandEA(const MCInst *MI, int opNum, raw_ostream &O);
|
|
|
|
void printFCCOperand(const MCInst *MI, int opNum, raw_ostream &O);
|
2013-09-24 14:20:00 +00:00
|
|
|
void printSHFMask(const MCInst *MI, int opNum, raw_ostream &O);
|
[mips] Print instructions "beq", "bne" and "or" using assembler pseudo
instructions "beqz", "bnez" and "move", when possible.
beq $2, $zero, $L1 => beqz $2, $L1
bne $2, $zero, $L1 => bnez $2, $L1
or $2, $3, $zero => move $2, $3
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187229 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 18:34:25 +00:00
|
|
|
|
|
|
|
bool printAlias(const char *Str, const MCInst &MI, unsigned OpNo,
|
|
|
|
raw_ostream &OS);
|
|
|
|
bool printAlias(const char *Str, const MCInst &MI, unsigned OpNo0,
|
|
|
|
unsigned OpNo1, raw_ostream &OS);
|
|
|
|
bool printAlias(const MCInst &MI, raw_ostream &OS);
|
2013-12-08 16:51:52 +00:00
|
|
|
void printSaveRestore(const MCInst *MI, raw_ostream &O);
|
2011-07-07 23:56:50 +00:00
|
|
|
};
|
|
|
|
} // end namespace llvm
|
|
|
|
|
|
|
|
#endif
|