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llvm-6502/test/MC/Disassembler/ARM/invalid-MOVTi16-arm.txt

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MOVi16 and MOVTi16 does not allow pc as the dest register, while MOVi allows it. Add tests for that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129137 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-08 17:29:58 +00:00
# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
# Opcode=185 Name=MOVTi16 Format=ARM_FORMAT_DPFRM(4)
Push GPRnopc through a large number of instruction definitions to tighten operand decoding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137189 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 00:03:03 +00:00
# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
MOVi16 and MOVTi16 does not allow pc as the dest register, while MOVi allows it. Add tests for that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129137 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-08 17:29:58 +00:00
# -------------------------------------------------------------------------------------------------
# | 1: 1: 1: 0| 0: 0: 1: 1| 0: 1: 0: 0| 0: 0: 0: 1| 1: 1: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0|
# -------------------------------------------------------------------------------------------------
Push GPRnopc through a large number of instruction definitions to tighten operand decoding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137189 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 00:03:03 +00:00
#
MOVi16 and MOVTi16 does not allow pc as the dest register, while MOVi allows it. Add tests for that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129137 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-08 17:29:58 +00:00
# if d == 15 then UNPREDICTABLE
0x00 0xf0 0x41 0xe3
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