llvm-6502/lib/Target/XCore/CMakeLists.txt

set(LLVM_TARGET_DEFINITIONS XCore.td)

tablegen(XCoreGenRegisterInfo.inc -gen-register-info)
tablegen(XCoreGenInstrInfo.inc -gen-instr-info)
tablegen(XCoreGenAsmWriter.inc -gen-asm-writer)
tablegen(XCoreGenDAGISel.inc -gen-dag-isel)
tablegen(XCoreGenCallingConv.inc -gen-callingconv)
tablegen(XCoreGenSubtargetInfo.inc -gen-subtarget)

add_llvm_target(XCoreCodeGen
  XCoreAsmPrinter.cpp
  XCoreFrameLowering.cpp
  XCoreInstrInfo.cpp
  XCoreISelDAGToDAG.cpp
  XCoreISelLowering.cpp
  XCoreMCAsmInfo.cpp
  XCoreRegisterInfo.cpp
  XCoreSubtarget.cpp
  XCoreTargetMachine.cpp
  XCoreTargetObjectFile.cpp
  XCoreSelectionDAGInfo.cpp
  )

add_subdirectory(TargetInfo)
add_subdirectory(MCTargetDesc)
Add XCore backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58838 91177308-0d34-0410-b5e6-96231b3b80d8 2008-11-07 10:59:00 +00:00			`set(LLVM_TARGET_DEFINITIONS XCore.td)`

Starting to refactor Target to separate out code that's needed to fully describe target machine from those that are only needed by codegen. The goal is to sink the essential target description into MC layer so we can start building MC based tools without needing to link in the entire codegen. First step is to refactor TargetRegisterInfo. This patch added a base class MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to separate register description from the rest of the stuff. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133782 91177308-0d34-0410-b5e6-96231b3b80d8 2011-06-24 01:44:41 +00:00			`tablegen(XCoreGenRegisterInfo.inc -gen-register-info)`
Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134024 91177308-0d34-0410-b5e6-96231b3b80d8 2011-06-28 20:07:07 +00:00			`tablegen(XCoreGenInstrInfo.inc -gen-instr-info)`
Add XCore backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58838 91177308-0d34-0410-b5e6-96231b3b80d8 2008-11-07 10:59:00 +00:00			`tablegen(XCoreGenAsmWriter.inc -gen-asm-writer)`
			`tablegen(XCoreGenDAGISel.inc -gen-dag-isel)`
			`tablegen(XCoreGenCallingConv.inc -gen-callingconv)`
Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134281 91177308-0d34-0410-b5e6-96231b3b80d8 2011-07-01 22:36:09 +00:00			`tablegen(XCoreGenSubtargetInfo.inc -gen-subtarget)`
Add XCore backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58838 91177308-0d34-0410-b5e6-96231b3b80d8 2008-11-07 10:59:00 +00:00
CMake: Change somme target library names: XCore->XCoreGen PIC16->PIC16CodeGen After updating your working copy, the first build will fail because it is using the old library dependencies. Start the build again and it will work fine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110127 91177308-0d34-0410-b5e6-96231b3b80d8 2010-08-03 17:40:31 +00:00			`add_llvm_target(XCoreCodeGen`
move all the target's asmprinters into the main target. The piece that should be split out is the InstPrinter (if a target is mc'ized). This change makes all the targets be consistent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119056 91177308-0d34-0410-b5e6-96231b3b80d8 2010-11-14 18:43:56 +00:00			`XCoreAsmPrinter.cpp`
Update CMake stuff git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123171 91177308-0d34-0410-b5e6-96231b3b80d8 2011-01-10 12:39:23 +00:00			`XCoreFrameLowering.cpp`
Add XCore backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58838 91177308-0d34-0410-b5e6-96231b3b80d8 2008-11-07 10:59:00 +00:00			`XCoreInstrInfo.cpp`
			`XCoreISelDAGToDAG.cpp`
			`XCoreISelLowering.cpp`
Normalize makefile comments and sort cmake file lists. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80584 91177308-0d34-0410-b5e6-96231b3b80d8 2009-08-31 13:05:24 +00:00			`XCoreMCAsmInfo.cpp`
Add XCore backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58838 91177308-0d34-0410-b5e6-96231b3b80d8 2008-11-07 10:59:00 +00:00			`XCoreRegisterInfo.cpp`
			`XCoreSubtarget.cpp`
			`XCoreTargetMachine.cpp`
Rip all of the global variable lowering logic out of TargetAsmInfo. Since it is highly specific to the object file that will be generated in the end, this introduces a new TargetLoweringObjectFile interface that is implemented for each of ELF/MachO/COFF/Alpha/PIC16 and XCore. Though still is still a brutal and ugly refactoring, this is a major step towards goodness. This patch also: 1. fixes a bunch of dangling pointer problems in the PIC16 backend. 2. disables the TargetLowering copy ctor which PIC16 was accidentally using. 3. gets us closer to xcore having its own crazy target section flags and pic16 not having to shadow sections with its own objects. 4. fixes wierdness where ELF targets would set CStringSection but not CStringSection_. Factor the code better. 5. fixes some bugs in string lowering on ELF targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77294 91177308-0d34-0410-b5e6-96231b3b80d8 2009-07-28 03:13:23 +00:00			`XCoreTargetObjectFile.cpp`
Add skeleton target-specific SelectionDAGInfo files. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101564 91177308-0d34-0410-b5e6-96231b3b80d8 2010-04-16 23:04:22 +00:00			`XCoreSelectionDAGInfo.cpp`
Add XCore backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58838 91177308-0d34-0410-b5e6-96231b3b80d8 2008-11-07 10:59:00 +00:00			`)`
Use explicit add_subdirectory's for LLVM target sublibraries instead of testing for its presence at cmake time. This way the build automatically regenerates the makefiles when a svn update brings in a new sublibrary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126068 91177308-0d34-0410-b5e6-96231b3b80d8 2011-02-20 02:55:27 +00:00
			`add_subdirectory(TargetInfo)`
Next round of MC refactoring. This patch factor MC table instantiations, MC registeration and creation code into XXXMCDesc libraries. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135184 91177308-0d34-0410-b5e6-96231b3b80d8 2011-07-14 20:59:42 +00:00			`add_subdirectory(MCTargetDesc)`