2010-11-15 08:49:58 +00:00
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//===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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2011-07-25 19:53:23 +00:00
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#include "MCTargetDesc/PPCMCTargetDesc.h"
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#include "MCTargetDesc/PPCFixupKinds.h"
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2012-03-17 18:46:09 +00:00
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#include "llvm/MC/MCAsmBackend.h"
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2011-08-02 15:51:38 +00:00
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#include "llvm/MC/MCELFObjectWriter.h"
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2012-03-26 06:58:25 +00:00
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#include "llvm/MC/MCFixupKindInfo.h"
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2010-12-16 16:08:33 +00:00
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#include "llvm/MC/MCMachObjectWriter.h"
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2010-11-15 08:49:58 +00:00
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#include "llvm/MC/MCObjectWriter.h"
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2012-12-03 16:50:05 +00:00
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#include "llvm/MC/MCSectionMachO.h"
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2011-06-24 23:44:37 +00:00
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#include "llvm/MC/MCValue.h"
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2011-08-02 15:51:38 +00:00
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#include "llvm/Support/ELF.h"
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#include "llvm/Support/ErrorHandling.h"
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2013-09-01 04:28:48 +00:00
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#include "llvm/Support/MachO.h"
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2011-08-24 18:08:43 +00:00
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#include "llvm/Support/TargetRegistry.h"
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2010-11-15 08:49:58 +00:00
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using namespace llvm;
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2013-05-15 15:01:46 +00:00
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static uint64_t adjustFixupValue(unsigned Kind, uint64_t Value) {
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2011-08-02 15:51:38 +00:00
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switch (Kind) {
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default:
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llvm_unreachable("Unknown fixup kind!");
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case FK_Data_1:
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case FK_Data_2:
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case FK_Data_4:
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2012-10-25 12:27:42 +00:00
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case FK_Data_8:
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2012-12-12 19:29:35 +00:00
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case PPC::fixup_ppc_nofixup:
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2011-08-02 15:51:38 +00:00
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return Value;
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case PPC::fixup_ppc_brcond14:
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2013-06-24 11:03:33 +00:00
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case PPC::fixup_ppc_brcond14abs:
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2012-10-25 12:27:42 +00:00
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return Value & 0xfffc;
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2011-08-02 15:51:38 +00:00
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case PPC::fixup_ppc_br24:
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2013-06-24 11:03:33 +00:00
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case PPC::fixup_ppc_br24abs:
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2011-08-02 15:51:38 +00:00
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return Value & 0x3fffffc;
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2013-05-17 12:37:21 +00:00
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case PPC::fixup_ppc_half16:
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2011-08-02 15:51:38 +00:00
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return Value & 0xffff;
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2013-05-17 12:37:21 +00:00
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case PPC::fixup_ppc_half16ds:
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PowerPC: Simplify handling of fixups.
MCTargetDesc/PPCMCCodeEmitter.cpp current has code like:
if (isSVR4ABI() && is64BitMode())
Fixups.push_back(MCFixup::Create(0, MO.getExpr(),
(MCFixupKind)PPC::fixup_ppc_toc16));
else
Fixups.push_back(MCFixup::Create(0, MO.getExpr(),
(MCFixupKind)PPC::fixup_ppc_lo16));
This is a problem for the asm parser, since it requires knowledge of
the ABI / 64-bit mode to be set up. However, more fundamentally,
at this point we shouldn't make such distinctions anyway; in an assembler
file, it always ought to be possible to e.g. generate TOC relocations even
when the main ABI is one that doesn't use TOC.
Fortunately, this is actually completely unnecessary; that code was added
to decide whether to generate TOC relocations, but that information is in
fact already encoded in the VariantKind of the underlying symbol.
This commit therefore merges those fixup types into one, and then decides
which relocation to use based on the VariantKind.
No changes in generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178007 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-26 10:56:47 +00:00
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return Value & 0xfffc;
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2011-08-02 15:51:38 +00:00
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}
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}
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2013-05-15 15:01:46 +00:00
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static unsigned getFixupKindNumBytes(unsigned Kind) {
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switch (Kind) {
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default:
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llvm_unreachable("Unknown fixup kind!");
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case FK_Data_1:
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return 1;
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case FK_Data_2:
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2013-05-17 12:37:21 +00:00
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case PPC::fixup_ppc_half16:
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case PPC::fixup_ppc_half16ds:
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2013-05-15 15:01:46 +00:00
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return 2;
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case FK_Data_4:
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case PPC::fixup_ppc_brcond14:
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2013-06-24 11:03:33 +00:00
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case PPC::fixup_ppc_brcond14abs:
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2013-05-15 15:01:46 +00:00
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case PPC::fixup_ppc_br24:
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2013-06-24 11:03:33 +00:00
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case PPC::fixup_ppc_br24abs:
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2013-05-15 15:01:46 +00:00
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return 4;
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case FK_Data_8:
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return 8;
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case PPC::fixup_ppc_nofixup:
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return 0;
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}
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}
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2010-11-15 08:49:58 +00:00
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namespace {
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2010-12-16 16:09:19 +00:00
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2011-07-25 23:24:55 +00:00
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class PPCAsmBackend : public MCAsmBackend {
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2014-03-24 18:16:09 +00:00
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const Target &TheTarget;
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bool IsLittleEndian;
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2010-12-16 16:08:43 +00:00
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public:
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2014-03-24 18:16:09 +00:00
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PPCAsmBackend(const Target &T, bool isLittle) : MCAsmBackend(), TheTarget(T),
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IsLittleEndian(isLittle) {}
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2010-12-16 03:20:06 +00:00
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2010-12-16 16:08:43 +00:00
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unsigned getNumFixupKinds() const { return PPC::NumTargetFixupKinds; }
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const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const {
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2014-03-24 18:16:09 +00:00
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const static MCFixupKindInfo InfosBE[PPC::NumTargetFixupKinds] = {
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2010-12-16 16:08:43 +00:00
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// name offset bits flags
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{ "fixup_ppc_br24", 6, 24, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_ppc_brcond14", 16, 14, MCFixupKindInfo::FKF_IsPCRel },
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2013-06-24 11:03:33 +00:00
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{ "fixup_ppc_br24abs", 6, 24, 0 },
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{ "fixup_ppc_brcond14abs", 16, 14, 0 },
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2013-05-17 12:37:21 +00:00
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{ "fixup_ppc_half16", 0, 16, 0 },
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{ "fixup_ppc_half16ds", 0, 14, 0 },
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2012-12-12 19:29:35 +00:00
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{ "fixup_ppc_nofixup", 0, 0, 0 }
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2010-12-16 16:08:43 +00:00
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};
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2014-03-24 18:16:09 +00:00
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const static MCFixupKindInfo InfosLE[PPC::NumTargetFixupKinds] = {
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// name offset bits flags
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{ "fixup_ppc_br24", 2, 24, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_ppc_brcond14", 2, 14, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_ppc_br24abs", 2, 24, 0 },
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{ "fixup_ppc_brcond14abs", 2, 14, 0 },
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{ "fixup_ppc_half16", 0, 16, 0 },
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{ "fixup_ppc_half16ds", 2, 14, 0 },
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{ "fixup_ppc_nofixup", 0, 0, 0 }
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};
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2012-01-18 18:52:20 +00:00
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2010-12-16 16:08:43 +00:00
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if (Kind < FirstTargetFixupKind)
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2011-07-25 23:24:55 +00:00
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return MCAsmBackend::getFixupKindInfo(Kind);
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2012-01-18 18:52:20 +00:00
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2010-12-16 16:08:43 +00:00
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assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
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"Invalid kind!");
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2014-03-24 18:16:09 +00:00
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return (IsLittleEndian? InfosLE : InfosBE)[Kind - FirstTargetFixupKind];
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2010-12-16 16:08:43 +00:00
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}
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2012-01-18 18:52:20 +00:00
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2012-11-24 13:18:17 +00:00
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void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
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2014-03-29 06:26:49 +00:00
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uint64_t Value, bool IsPCRel) const {
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2012-11-24 13:18:17 +00:00
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Value = adjustFixupValue(Fixup.getKind(), Value);
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if (!Value) return; // Doesn't change encoding.
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unsigned Offset = Fixup.getOffset();
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2013-05-15 15:01:46 +00:00
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unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind());
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2012-11-24 13:18:17 +00:00
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// For each byte of the fragment that the fixup touches, mask in the bits
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// from the fixup value. The Value has been "split up" into the appropriate
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// bitfields above.
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2014-03-24 18:16:09 +00:00
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for (unsigned i = 0; i != NumBytes; ++i) {
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unsigned Idx = IsLittleEndian ? i : (NumBytes - 1 - i);
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Data[Offset + i] |= uint8_t((Value >> (Idx * 8)) & 0xff);
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}
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2012-11-24 13:18:17 +00:00
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}
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2012-01-18 18:52:16 +00:00
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bool mayNeedRelaxation(const MCInst &Inst) const {
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2010-12-16 16:08:43 +00:00
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// FIXME.
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return false;
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}
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2011-12-06 00:47:03 +00:00
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bool fixupNeedsRelaxation(const MCFixup &Fixup,
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uint64_t Value,
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2013-01-08 00:22:56 +00:00
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const MCRelaxableFragment *DF,
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2011-12-06 00:47:03 +00:00
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const MCAsmLayout &Layout) const {
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// FIXME.
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2012-02-07 02:50:20 +00:00
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llvm_unreachable("relaxInstruction() unimplemented");
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2011-12-06 00:47:03 +00:00
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}
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2012-01-18 18:52:20 +00:00
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2012-01-18 18:52:16 +00:00
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void relaxInstruction(const MCInst &Inst, MCInst &Res) const {
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2010-12-16 16:08:43 +00:00
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// FIXME.
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2012-02-07 02:50:20 +00:00
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llvm_unreachable("relaxInstruction() unimplemented");
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2010-12-16 16:08:43 +00:00
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}
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2012-01-18 18:52:20 +00:00
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2012-01-18 18:52:16 +00:00
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bool writeNopData(uint64_t Count, MCObjectWriter *OW) const {
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2013-07-04 18:28:46 +00:00
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uint64_t NumNops = Count / 4;
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for (uint64_t i = 0; i != NumNops; ++i)
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OW->Write32(0x60000000);
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2013-09-26 09:18:48 +00:00
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switch (Count % 4) {
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default: break; // No leftover bytes to write
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case 1: OW->Write8(0); break;
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case 2: OW->Write16(0); break;
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case 3: OW->Write16(0); OW->Write8(0); break;
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}
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2010-12-16 16:08:43 +00:00
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return true;
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2012-01-18 18:52:20 +00:00
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}
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2010-12-16 16:08:43 +00:00
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unsigned getPointerSize() const {
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StringRef Name = TheTarget.getName();
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2013-07-26 01:35:43 +00:00
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if (Name == "ppc64" || Name == "ppc64le") return 8;
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2010-12-16 16:08:43 +00:00
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assert(Name == "ppc32" && "Unknown target name!");
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return 4;
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}
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2014-03-24 18:16:09 +00:00
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bool isLittleEndian() const {
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return IsLittleEndian;
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}
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2010-12-16 16:08:43 +00:00
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};
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2010-11-15 08:49:58 +00:00
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} // end anonymous namespace
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// FIXME: This should be in a separate file.
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namespace {
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class DarwinPPCAsmBackend : public PPCAsmBackend {
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public:
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2014-03-24 18:16:09 +00:00
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DarwinPPCAsmBackend(const Target &T) : PPCAsmBackend(T, false) { }
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2012-01-18 18:52:20 +00:00
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2010-11-15 08:49:58 +00:00
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MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
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bool is64 = getPointerSize() == 8;
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2013-08-08 20:14:40 +00:00
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return createPPCMachObjectWriter(
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OS,
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/*Is64Bit=*/is64,
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2013-09-01 04:28:48 +00:00
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(is64 ? MachO::CPU_TYPE_POWERPC64 : MachO::CPU_TYPE_POWERPC),
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MachO::CPU_SUBTYPE_POWERPC_ALL);
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2010-11-15 08:49:58 +00:00
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}
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};
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2011-08-02 15:51:38 +00:00
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class ELFPPCAsmBackend : public PPCAsmBackend {
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2011-12-21 17:00:36 +00:00
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uint8_t OSABI;
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2011-08-02 15:51:38 +00:00
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public:
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2014-03-24 18:16:09 +00:00
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ELFPPCAsmBackend(const Target &T, bool IsLittleEndian, uint8_t OSABI) :
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PPCAsmBackend(T, IsLittleEndian), OSABI(OSABI) { }
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2012-01-18 18:52:20 +00:00
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2011-08-02 15:51:38 +00:00
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MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
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bool is64 = getPointerSize() == 8;
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2014-03-24 18:16:09 +00:00
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return createPPCELFObjectWriter(OS, is64, isLittleEndian(), OSABI);
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2011-08-02 15:51:38 +00:00
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}
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};
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2010-11-15 08:49:58 +00:00
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} // end anonymous namespace
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2013-09-09 02:37:14 +00:00
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MCAsmBackend *llvm::createPPCAsmBackend(const Target &T,
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const MCRegisterInfo &MRI,
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StringRef TT, StringRef CPU) {
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2011-04-19 21:14:45 +00:00
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if (Triple(TT).isOSDarwin())
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2010-11-15 08:49:58 +00:00
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return new DarwinPPCAsmBackend(T);
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2011-04-19 21:14:45 +00:00
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2011-12-21 17:00:36 +00:00
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uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(Triple(TT).getOS());
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2014-03-24 18:16:09 +00:00
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bool IsLittleEndian = Triple(TT).getArch() == Triple::ppc64le;
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return new ELFPPCAsmBackend(T, IsLittleEndian, OSABI);
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2010-11-15 08:49:58 +00:00
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}
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