mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-21 16:31:16 +00:00
82 lines
2.8 KiB
C++
82 lines
2.8 KiB
C++
|
//===-- PreAllocSplitting.cpp - Pre-allocation Interval Spltting Pass. ----===//
|
||
|
//
|
||
|
// The LLVM Compiler Infrastructure
|
||
|
//
|
||
|
// This file is distributed under the University of Illinois Open Source
|
||
|
// License. See LICENSE.TXT for details.
|
||
|
//
|
||
|
//===----------------------------------------------------------------------===//
|
||
|
//
|
||
|
// This file implements the machine instruction level pre-register allocation
|
||
|
// live interval splitting pass. It finds live interval barriers, i.e.
|
||
|
// instructions which will kill all physical registers in certain register
|
||
|
// classes, and split all live intervals which cross the barrier.
|
||
|
//
|
||
|
//===----------------------------------------------------------------------===//
|
||
|
|
||
|
#define DEBUG_TYPE "pre-alloc-split"
|
||
|
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
|
||
|
#include "llvm/CodeGen/MachineFunctionPass.h"
|
||
|
#include "llvm/CodeGen/MachineLoopInfo.h"
|
||
|
#include "llvm/CodeGen/MachineRegisterInfo.h"
|
||
|
#include "llvm/CodeGen/Passes.h"
|
||
|
#include "llvm/CodeGen/RegisterCoalescer.h"
|
||
|
#include "llvm/Target/TargetMachine.h"
|
||
|
#include "llvm/Target/TargetOptions.h"
|
||
|
#include "llvm/Target/TargetRegisterInfo.h"
|
||
|
#include "llvm/Support/CommandLine.h"
|
||
|
#include "llvm/Support/Debug.h"
|
||
|
#include "llvm/ADT/PostOrderIterator.h"
|
||
|
#include "llvm/ADT/SmallPtrSet.h"
|
||
|
using namespace llvm;
|
||
|
|
||
|
namespace {
|
||
|
class VISIBILITY_HIDDEN PreAllocSplitting : public MachineFunctionPass {
|
||
|
// ProcessedBarriers - Register live interval barriers that have already
|
||
|
// been processed.
|
||
|
SmallPtrSet<MachineInstr*, 16> ProcessedBarriers;
|
||
|
|
||
|
// ActiveBarriers - Register live interval barriers that are currently
|
||
|
// being processed.
|
||
|
SmallSet<unsigned, 16> ActiveBarriers;
|
||
|
public:
|
||
|
static char ID;
|
||
|
PreAllocSplitting() : MachineFunctionPass(&ID) {}
|
||
|
|
||
|
virtual bool runOnMachineFunction(MachineFunction &MF);
|
||
|
|
||
|
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
|
||
|
AU.addRequired<LiveIntervals>();
|
||
|
AU.addPreserved<LiveIntervals>();
|
||
|
AU.addPreserved<MachineLoopInfo>();
|
||
|
AU.addPreserved<RegisterCoalescer>();
|
||
|
if (StrongPHIElim)
|
||
|
AU.addPreservedID(StrongPHIEliminationID);
|
||
|
else
|
||
|
AU.addPreservedID(PHIEliminationID);
|
||
|
AU.addPreservedID(TwoAddressInstructionPassID);
|
||
|
MachineFunctionPass::getAnalysisUsage(AU);
|
||
|
}
|
||
|
|
||
|
virtual void releaseMemory() {
|
||
|
ProcessedBarriers.clear();
|
||
|
ActiveBarriers.clear();
|
||
|
}
|
||
|
|
||
|
virtual const char *getPassName() const {
|
||
|
return "Pre-Register Allocaton Live Interval Splitting";
|
||
|
}
|
||
|
};
|
||
|
} // end anonymous namespace
|
||
|
|
||
|
char PreAllocSplitting::ID = 0;
|
||
|
|
||
|
static RegisterPass<PreAllocSplitting>
|
||
|
X("pre-alloc-splitting", "Pre-Register Allocation Live Interval Splitting");
|
||
|
|
||
|
const PassInfo *const llvm::PreAllocSplittingID = &X;
|
||
|
|
||
|
bool PreAllocSplitting::runOnMachineFunction(MachineFunction &MF) {
|
||
|
return false;
|
||
|
}
|