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llvm-6502/test/CodeGen/X86/avx512bw-mask-op.ll

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[SKX] Enabling mask logic instructions: encoding, lowering Instructions: KAND{BWDQ}, KANDN{BWDQ}, KOR{BWDQ}, KXOR{BWDQ}, KXNOR{BWDQ} Reviewed by Elena Demikhovsky <elena.demikhovsky@intel.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214081 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-28 13:46:45 +00:00
; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s
[SKX] Added missed test files for rev 213757 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213780 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 18:17:49 +00:00
define i32 @mask32(i32 %x) {
%m0 = bitcast i32 %x to <32 x i1>
%m1 = xor <32 x i1> %m0, <i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1,
i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1,
i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1,
i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1>
%ret = bitcast <32 x i1> %m1 to i32
ret i32 %ret
; CHECK-LABEL: mask32
; CHECK: kmovd
; CHECK-NEXT: knotd
; CHECK-NEXT: kmovd
; CHECK_NEXT: ret
}
define i64 @mask64(i64 %x) {
%m0 = bitcast i64 %x to <64 x i1>
%m1 = xor <64 x i1> %m0, <i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1,
i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1,
i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1,
i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1,
i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1,
i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1,
i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1,
i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1>
%ret = bitcast <64 x i1> %m1 to i64
ret i64 %ret
; CHECK-LABEL: mask64
; CHECK: kmovq
; CHECK-NEXT: knotq
; CHECK-NEXT: kmovq
; CHECK_NEXT: ret
}
define void @mask32_mem(i32* %ptr) {
%x = load i32* %ptr, align 4
%m0 = bitcast i32 %x to <32 x i1>
%m1 = xor <32 x i1> %m0, <i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1,
i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1,
i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1,
i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1>
%ret = bitcast <32 x i1> %m1 to i32
store i32 %ret, i32* %ptr, align 4
ret void
; CHECK-LABEL: mask32_mem
Let llvm/test/CodeGen/X86/avx512*-mask-op.ll(s) aware of Win32 x64 calling convention. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213812 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 22:38:25 +00:00
; CHECK: kmovd ([[ARG1:%rdi|%rcx]]), %k{{[0-7]}}
[SKX] Added missed test files for rev 213757 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213780 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 18:17:49 +00:00
; CHECK-NEXT: knotd
Let llvm/test/CodeGen/X86/avx512*-mask-op.ll(s) aware of Win32 x64 calling convention. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213812 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 22:38:25 +00:00
; CHECK-NEXT: kmovd %k{{[0-7]}}, ([[ARG1]])
[SKX] Added missed test files for rev 213757 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213780 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 18:17:49 +00:00
; CHECK_NEXT: ret
}
define void @mask64_mem(i64* %ptr) {
%x = load i64* %ptr, align 4
%m0 = bitcast i64 %x to <64 x i1>
%m1 = xor <64 x i1> %m0, <i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1,
i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1,
i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1,
i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1,
i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1,
i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1,
i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1,
i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1>
%ret = bitcast <64 x i1> %m1 to i64
store i64 %ret, i64* %ptr, align 4
ret void
; CHECK-LABEL: mask64_mem
Let llvm/test/CodeGen/X86/avx512*-mask-op.ll(s) aware of Win32 x64 calling convention. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213812 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 22:38:25 +00:00
; CHECK: kmovq ([[ARG1]]), %k{{[0-7]}}
[SKX] Added missed test files for rev 213757 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213780 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 18:17:49 +00:00
; CHECK-NEXT: knotq
Let llvm/test/CodeGen/X86/avx512*-mask-op.ll(s) aware of Win32 x64 calling convention. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213812 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 22:38:25 +00:00
; CHECK-NEXT: kmovq %k{{[0-7]}}, ([[ARG1]])
[SKX] Added missed test files for rev 213757 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213780 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 18:17:49 +00:00
; CHECK_NEXT: ret
}
[SKX] Enabling mask logic instructions: encoding, lowering Instructions: KAND{BWDQ}, KANDN{BWDQ}, KOR{BWDQ}, KXOR{BWDQ}, KXNOR{BWDQ} Reviewed by Elena Demikhovsky <elena.demikhovsky@intel.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214081 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-28 13:46:45 +00:00
define i32 @mand32(i32 %x, i32 %y) {
%ma = bitcast i32 %x to <32 x i1>
%mb = bitcast i32 %y to <32 x i1>
%mc = and <32 x i1> %ma, %mb
%md = xor <32 x i1> %ma, %mb
%me = or <32 x i1> %mc, %md
%ret = bitcast <32 x i1> %me to i32
; CHECK: kandd
; CHECK: kxord
; CHECK: kord
ret i32 %ret
}
define i64 @mand64(i64 %x, i64 %y) {
%ma = bitcast i64 %x to <64 x i1>
%mb = bitcast i64 %y to <64 x i1>
%mc = and <64 x i1> %ma, %mb
%md = xor <64 x i1> %ma, %mb
%me = or <64 x i1> %mc, %md
%ret = bitcast <64 x i1> %me to i64
; CHECK: kandq
; CHECK: kxorq
; CHECK: korq
ret i64 %ret
}
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