2014-05-30 10:09:59 +00:00
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; RUN: llc -mcpu=cortex-a8 -arm-atomic-cfg-tidy=0 < %s | FileCheck %s
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2009-11-02 00:12:06 +00:00
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
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target triple = "armv7-eabi"
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define arm_aapcs_vfpcc void @foo(i8* nocapture %pBuffer, i32 %numItems) nounwind {
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entry:
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br i1 undef, label %return, label %bb
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bb: ; preds = %bb, %entry
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2010-11-27 06:35:16 +00:00
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; CHECK: vld1.16 {d16[], d17[]}
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2010-05-21 21:05:32 +00:00
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%0 = load i16* undef, align 2
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%1 = insertelement <8 x i16> undef, i16 %0, i32 2
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%2 = insertelement <8 x i16> %1, i16 undef, i32 3
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%3 = mul <8 x i16> %2, %2
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%4 = extractelement <8 x i16> %3, i32 2
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store i16 %4, i16* undef, align 2
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2009-11-02 00:12:06 +00:00
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br i1 undef, label %return, label %bb
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return: ; preds = %bb, %entry
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ret void
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}
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