llvm-6502/test/CodeGen/X86/select-i8.ll

; RUN: llvm-as < %s | llc -march=x86 > %t
; RUN: not grep movz %t
; RUN: not grep cmov %t
; RUN: grep movb %t | count 2

; Don't try to use a 16-bit conditional move to do an 8-bit select,
; because it isn't worth it. Just use a branch instead.

define i8 @foo(i1 inreg %c, i8 inreg %a, i8 inreg %b) {
  %d = select i1 %c, i8 %a, i8 %b
  ret i8 %d
}
Expand i8 selects into control flow instead of 16-bit conditional moves. This avoids the need to promote the operands (or implicitly extend them, a partial register update condition), and can reduce i8 register pressure. This substantially speeds up code such as write_hex in lib/Support/raw_ostream.cpp. subclass-coalesce.ll is too trivial and no longer tests what it was originally intended to test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80184 91177308-0d34-0410-b5e6-96231b3b80d8 2009-08-27 00:14:12 +00:00			`; RUN: llvm-as < %s \| llc -march=x86 > %t`
			`; RUN: not grep movz %t`
			`; RUN: not grep cmov %t`
			`; RUN: grep movb %t \| count 2`

			`; Don't try to use a 16-bit conditional move to do an 8-bit select,`
			`; because it isn't worth it. Just use a branch instead.`

			`define i8 @foo(i1 inreg %c, i8 inreg %a, i8 inreg %b) {`
			`%d = select i1 %c, i8 %a, i8 %b`
			`ret i8 %d`
			`}`