llvm-6502/test/CodeGen/R600/store-v3i32.ll

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; XFAIL: *
; RUN: llc -verify-machineinstrs -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI %s
; 3 vectors have the same size and alignment as 4 vectors, so this
; should be done in a single store.
; SI-LABEL: @store_v3i32:
; SI: BUFFER_STORE_DWORDX4
define void @store_v3i32(<3 x i32> addrspace(1)* %out, <3 x i32> %a) nounwind {
store <3 x i32> %a, <3 x i32> addrspace(1)* %out, align 16
ret void
}