llvm-6502/test/CodeGen/X86/fast-isel-phys.ll

; RUN: llvm-as < %s | llc -fast-isel -fast-isel-abort -march=x86

define i8 @t2(i8 %a, i8 %c) nounwind {
       %tmp = shl i8 %a, %c
       ret i8 %tmp
}

define i8 @t1(i8 %a) nounwind {
       %tmp = mul i8 %a, 17
       ret i8 %tmp
}
Improve FastISel's handling of truncates to i1, and implement ptrtoint and inttoptr in X86FastISel. These casts aren't always handled in the generic FastISel code because X86 sometimes needs custom code to do truncation and zero-extension. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66988 91177308-0d34-0410-b5e6-96231b3b80d8 2009-03-13 23:53:06 +00:00			`; RUN: llvm-as < %s \| llc -fast-isel -fast-isel-abort -march=x86`
Correctly handle physical register inputs. They are not explicit input operands in the resulting machine instrs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55893 91177308-0d34-0410-b5e6-96231b3b80d8 2008-09-08 08:39:33 +00:00
			`define i8 @t2(i8 %a, i8 %c) nounwind {`
			`%tmp = shl i8 %a, %c`
			`ret i8 %tmp`
			`}`

			`define i8 @t1(i8 %a) nounwind {`
			`%tmp = mul i8 %a, 17`
			`ret i8 %tmp`
			`}`