llvm-6502/test/MC/Disassembler/X86/simple-tests.txt

# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 | FileCheck %s

# CHECK: int	$33
0xCD 0x21 

# CHECK: int	$33
0xCD 0x21


# CHECK: addb	%al, (%rax)
0 0

# CHECK: callq	-1234
0xe8 0x2e 0xfb 0xff 0xff

# CHECK: lfence
0x0f 0xae 0xe8

# CHECK: mfence
0x0f 0xae 0xf0

# CHECK: monitor
0x0f 0x01 0xc8

# CHECK: mwait
0x0f 0x01 0xc9

# CHECK: vmcall
0x0f 0x01 0xc1

# CHECK: vmlaunch
0x0f 0x01 0xc2

# CHECK: vmresume
0x0f 0x01 0xc3

# CHECK: vmxoff
0x0f 0x01 0xc4

# CHECK: swapgs
0x0f 0x01 0xf8

# CHECK: rdtscp
0x0f 0x01 0xf9

# CHECK: vmxon
0xf3 0x0f 0xc7 0x30

# CHECK: vmptrld
0x0f 0xc7 0x30

# CHECK: vmptrst
0x0f 0xc7 0x38

# CHECK: movl $0, -4(%rbp)
0xc7 0x45 0xfc 0x00 0x00 0x00 0x00

# CHECK: movq	%cr0, %rcx
0x0f 0x20 0xc1

# CHECK: leal	4(%rsp), %ecx
0x8d 0x4c 0x24 0x04 

# CHECK: enter	$1, $2
0xc8 0x01 0x00 0x02

# CHECK: movw	$47416, -66(%rbp)
0x66 0xc7 0x45 0xbe 0x38 0xb9
specify a triple to use, fixing the test on non-x86-64 hosts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91900 91177308-0d34-0410-b5e6-96231b3b80d8 2009-12-22 07:01:12 +00:00			`# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 \| FileCheck %s`
rewrite the file parser for the disassembler, implementing support for comments. Also, check in a simple testcase for the disassembler, including a test for r91864 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91894 91177308-0d34-0410-b5e6-96231b3b80d8 2009-12-22 06:37:58 +00:00
			`# CHECK: int $33`
			`0xCD 0x21`

			`# CHECK: int $33`
			`0xCD 0x21`


			`# CHECK: addb %al, (%rax)`
various cleanups, make the disassemble reject lines with too much data on them, for example: addb %al, (%rax) simple-tests.txt:11:5: error: excess data detected in input 0 0 0 0 0 ^ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91896 91177308-0d34-0410-b5e6-96231b3b80d8 2009-12-22 06:56:51 +00:00			`0 0`
rewrite the file parser for the disassembler, implementing support for comments. Also, check in a simple testcase for the disassembler, including a test for r91864 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91894 91177308-0d34-0410-b5e6-96231b3b80d8 2009-12-22 06:37:58 +00:00
			`# CHECK: callq -1234`
			`0xe8 0x2e 0xfb 0xff 0xff`

add some disassemble testcases for weird instructions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96045 91177308-0d34-0410-b5e6-96231b3b80d8 2010-02-12 23:46:48 +00:00			`# CHECK: lfence`
			`0x0f 0xae 0xe8`

			`# CHECK: mfence`
			`0x0f 0xae 0xf0`

			`# CHECK: monitor`
			`0x0f 0x01 0xc8`

			`# CHECK: mwait`
			`0x0f 0x01 0xc9`

			`# CHECK: vmcall`
			`0x0f 0x01 0xc1`
remove special cases for vmlaunch, vmresume, vmxoff, and swapgs fix swapgs to be spelled right. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96058 91177308-0d34-0410-b5e6-96231b3b80d8 2010-02-13 00:41:14 +00:00
			`# CHECK: vmlaunch`
			`0x0f 0x01 0xc2`

			`# CHECK: vmresume`
			`0x0f 0x01 0xc3`

			`# CHECK: vmxoff`
			`0x0f 0x01 0xc4`

			`# CHECK: swapgs`
add encoder support and tests for rdtscp git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96076 91177308-0d34-0410-b5e6-96231b3b80d8 2010-02-13 03:42:24 +00:00			`0x0f 0x01 0xf8`

			`# CHECK: rdtscp`
Fix the vmxon entry in the X86InstrInfo.td so it has the correct prefix bytes for the encoding and is not the same as vmptrld. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97992 91177308-0d34-0410-b5e6-96231b3b80d8 2010-03-08 22:17:26 +00:00			`0x0f 0x01 0xf9`

			`# CHECK: vmxon`
			`0xf3 0x0f 0xc7 0x30`

			`# CHECK: vmptrld`
			`0x0f 0xc7 0x30`

			`# CHECK: vmptrst`
			`0x0f 0xc7 0x38`
testcase for r101538, patch by Nico Schmidt! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101642 91177308-0d34-0410-b5e6-96231b3b80d8 2010-04-17 17:22:06 +00:00
			`# CHECK: movl $0, -4(%rbp)`
			`0xc7 0x45 0xfc 0x00 0x00 0x00 0x00`
Eliminated the classification of control registers into %ecr_ and %rcr_, leaving just %cr_ which is what people expect. Updated the disassembler to support this unified register set. Added a testcase to verify that the registers continue to be decoded correctly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103196 91177308-0d34-0410-b5e6-96231b3b80d8 2010-05-06 20:59:00 +00:00
			`# CHECK: movq %cr0, %rcx`
			`0x0f 0x20 0xc1`
my work on adding segment registers to LEA missed the disassembler. Remove some code from the disassembler to compensate, unbreaking disassembly of lea's. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108226 91177308-0d34-0410-b5e6-96231b3b80d8 2010-07-13 04:23:55 +00:00
			`# CHECK: leal 4(%rsp), %ecx`
Added a testcase for the ENTER instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115580 91177308-0d34-0410-b5e6-96231b3b80d8 2010-10-05 00:21:40 +00:00			`0x8d 0x4c 0x24 0x04`

			`# CHECK: enter $1, $2`
			`0xc8 0x01 0x00 0x02`
Fixed handling of immediate operand sizes, which weren't properly reflecting the OperandSize attribute of the instruction leading to improper decoding of certain instructions with the 66H prefix. Also added a test case for this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117084 91177308-0d34-0410-b5e6-96231b3b80d8 2010-10-22 01:24:11 +00:00
			`# CHECK: movw $47416, -66(%rbp)`
			`0x66 0xc7 0x45 0xbe 0x38 0xb9`