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https://github.com/c64scene-ar/llvm-6502.git
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66 lines
2.4 KiB
C
66 lines
2.4 KiB
C
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//===-- llvm/CodeGen/DwarfExpression.h - Dwarf Compile Unit ---*- C++ -*--===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains support for writing dwarf compile unit.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
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#define LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
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#include "llvm/Support/DataTypes.h"
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namespace llvm {
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class TargetMachine;
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/// Base class containing the logic for constructing DWARF expressions
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/// independently of whether they are emitted into a DIE or into a .debug_loc
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/// entry.
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class DwarfExpression {
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TargetMachine &TM;
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public:
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DwarfExpression(TargetMachine &TM) : TM(TM) {}
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virtual void EmitOp(uint8_t Op, const char* Comment = nullptr) = 0;
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virtual void EmitSigned(int Value) = 0;
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virtual void EmitUnsigned(unsigned Value) = 0;
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/// Emit a dwarf register operation.
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void AddReg(int DwarfReg, const char* Comment = nullptr);
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/// Emit an (double-)indirect dwarf register operation.
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void AddRegIndirect(int DwarfReg, int Offset, bool Deref = false);
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/// Emit a dwarf register operation for describing
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/// - a small value occupying only part of a register or
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/// - a register representing only part of a value.
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void AddOpPiece(unsigned SizeInBits, unsigned OffsetInBits = 0);
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/// Emit a shift-right dwarf expression.
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void AddShr(unsigned ShiftBy);
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/// \brief Emit a partial DWARF register operation.
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/// \param MLoc the register
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/// \param PieceSize size and
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/// \param PieceOffset offset of the piece in bits, if this is one
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/// piece of an aggregate value.
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///
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/// If size and offset is zero an operation for the entire
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/// register is emitted: Some targets do not provide a DWARF
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/// register number for every register. If this is the case, this
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/// function will attempt to emit a DWARF register by emitting a
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/// piece of a super-register or by piecing together multiple
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/// subregisters that alias the register.
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void AddMachineRegPiece(unsigned MachineReg,
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unsigned PieceSizeInBits = 0,
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unsigned PieceOffsetInBits = 0);
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};
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}
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#endif
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