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Add PowerPC intrinsics to support dcbz[l]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28696 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -15,6 +15,15 @@
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// Definitions for all PowerPC intrinsics.
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//
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// Non-altivec intrinsics.
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let TargetPrefix = "ppc" in { // All intrinsics start with "llvm.ppc.".
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// dcbz instruction.
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def int_ppc_dcbz : Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
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// dcbzl (PPC970) instruction.
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def int_ppc_dcbzl : Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
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}
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let TargetPrefix = "ppc" in { // All PPC intrinsics start with "llvm.ppc.".
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/// PowerPC_Vec_Intrinsic - Base class for all altivec intrinsics.
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class PowerPC_Vec_Intrinsic<string GCCIntSuffix, list<LLVMType> types,
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@ -325,6 +325,23 @@ class XForm_28<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
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: XForm_base_r3xo<opcode, xo, OL, asmstr, itin, pattern> {
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}
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// DCB_Form - Form X instruction, used for dcb* instructions.
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class DCB_Form<bits<10> xo, bits<5> immfield, dag OL, string asmstr,
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InstrItinClass itin, list<dag> pattern>
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: I<31, OL, asmstr, itin> {
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bits<5> A;
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bits<5> B;
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let Pattern = pattern;
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let Inst{6-10} = immfield;
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let Inst{11-15} = A;
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let Inst{16-20} = B;
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let Inst{21-30} = xo;
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let Inst{31} = 0;
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}
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// DSS_Form - Form X instruction, used for altivec dss* instructions.
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class DSS_Form<bits<10> xo, dag OL, string asmstr,
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InstrItinClass itin, list<dag> pattern>
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@ -318,6 +318,14 @@ let isCall = 1, noResults = 1, PPC970_Unit = 7,
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[(PPCbctrl)]>;
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}
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// DCB* instructions.
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def DCBZ : DCB_Form<1014, 0, (ops memrr:$dst),
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"dcbz $dst", LdStDCBF, [(int_ppc_dcbz xoaddr:$dst)]>,
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PPC970_DGroup_Single;
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def DCBZL : DCB_Form<1014, 1, (ops memrr:$dst),
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"dcbzl $dst", LdStDCBF, [(int_ppc_dcbzl xoaddr:$dst)]>,
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PPC970_DGroup_Single;
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// D-Form instructions. Most instructions that perform an operation on a
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// register and an immediate are of this type.
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//
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