mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-23 02:29:18 +00:00
Use range-based for loops. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238154 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper
parent
0cb6d37dea
commit
002c5281ef
@ -324,12 +324,10 @@ static void DoInitialMatch(const SCEV *S, Loop *L,
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DoInitialMatch(NewMul, L, MyGood, MyBad, SE);
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const SCEV *NegOne = SE.getSCEV(ConstantInt::getAllOnesValue(
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SE.getEffectiveSCEVType(NewMul->getType())));
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for (SmallVectorImpl<const SCEV *>::const_iterator I = MyGood.begin(),
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E = MyGood.end(); I != E; ++I)
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Good.push_back(SE.getMulExpr(NegOne, *I));
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for (SmallVectorImpl<const SCEV *>::const_iterator I = MyBad.begin(),
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E = MyBad.end(); I != E; ++I)
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Bad.push_back(SE.getMulExpr(NegOne, *I));
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for (const SCEV *S : MyGood)
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Good.push_back(SE.getMulExpr(NegOne, S));
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for (const SCEV *S : MyBad)
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Bad.push_back(SE.getMulExpr(NegOne, S));
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return;
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}
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@ -441,9 +439,8 @@ bool Formula::hasRegsUsedByUsesOtherThan(size_t LUIdx,
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if (ScaledReg)
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if (RegUses.isRegUsedByUsesOtherThan(ScaledReg, LUIdx))
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return true;
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for (SmallVectorImpl<const SCEV *>::const_iterator I = BaseRegs.begin(),
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E = BaseRegs.end(); I != E; ++I)
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if (RegUses.isRegUsedByUsesOtherThan(*I, LUIdx))
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for (const SCEV *BaseReg : BaseRegs)
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if (RegUses.isRegUsedByUsesOtherThan(BaseReg, LUIdx))
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return true;
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return false;
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}
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@ -458,10 +455,9 @@ void Formula::print(raw_ostream &OS) const {
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if (!First) OS << " + "; else First = false;
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OS << BaseOffset;
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}
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for (SmallVectorImpl<const SCEV *>::const_iterator I = BaseRegs.begin(),
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E = BaseRegs.end(); I != E; ++I) {
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for (const SCEV *BaseReg : BaseRegs) {
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if (!First) OS << " + "; else First = false;
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OS << "reg(" << **I << ')';
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OS << "reg(" << *BaseReg << ')';
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}
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if (HasBaseReg && BaseRegs.empty()) {
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if (!First) OS << " + "; else First = false;
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@ -574,10 +570,8 @@ static const SCEV *getExactSDiv(const SCEV *LHS, const SCEV *RHS,
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if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(LHS)) {
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if (IgnoreSignificantBits || isAddSExtable(Add, SE)) {
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SmallVector<const SCEV *, 8> Ops;
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for (SCEVAddExpr::op_iterator I = Add->op_begin(), E = Add->op_end();
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I != E; ++I) {
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const SCEV *Op = getExactSDiv(*I, RHS, SE,
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IgnoreSignificantBits);
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for (const SCEV *S : Add->operands()) {
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const SCEV *Op = getExactSDiv(S, RHS, SE, IgnoreSignificantBits);
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if (!Op) return nullptr;
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Ops.push_back(Op);
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}
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@ -591,9 +585,7 @@ static const SCEV *getExactSDiv(const SCEV *LHS, const SCEV *RHS,
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if (IgnoreSignificantBits || isMulSExtable(Mul, SE)) {
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SmallVector<const SCEV *, 4> Ops;
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bool Found = false;
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for (SCEVMulExpr::op_iterator I = Mul->op_begin(), E = Mul->op_end();
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I != E; ++I) {
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const SCEV *S = *I;
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for (const SCEV *S : Mul->operands()) {
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if (!Found)
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if (const SCEV *Q = getExactSDiv(S, RHS, SE,
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IgnoreSignificantBits)) {
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@ -763,9 +755,8 @@ static bool isHighCostExpansion(const SCEV *S,
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return false;
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if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
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for (SCEVAddExpr::op_iterator I = Add->op_begin(), E = Add->op_end();
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I != E; ++I) {
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if (isHighCostExpansion(*I, Processed, SE))
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for (const SCEV *S : Add->operands()) {
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if (isHighCostExpansion(S, Processed, SE))
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return true;
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}
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return false;
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@ -816,9 +807,9 @@ DeleteTriviallyDeadInstructions(SmallVectorImpl<WeakVH> &DeadInsts) {
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if (!I || !isInstructionTriviallyDead(I))
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continue;
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for (User::op_iterator OI = I->op_begin(), E = I->op_end(); OI != E; ++OI)
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if (Instruction *U = dyn_cast<Instruction>(*OI)) {
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*OI = nullptr;
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for (Use &O : I->operands())
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if (Instruction *U = dyn_cast<Instruction>(O)) {
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O = nullptr;
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if (U->use_empty())
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DeadInsts.push_back(U);
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}
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@ -999,9 +990,7 @@ void Cost::RateFormula(const TargetTransformInfo &TTI,
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if (isLoser())
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return;
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}
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for (SmallVectorImpl<const SCEV *>::const_iterator I = F.BaseRegs.begin(),
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E = F.BaseRegs.end(); I != E; ++I) {
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const SCEV *BaseReg = *I;
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for (const SCEV *BaseReg : F.BaseRegs) {
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if (VisitedRegs.count(BaseReg)) {
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Lose();
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return;
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@ -1024,9 +1013,8 @@ void Cost::RateFormula(const TargetTransformInfo &TTI,
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ScaleCost += getScalingFactorCost(TTI, LU, F);
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// Tally up the non-zero immediates.
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for (SmallVectorImpl<int64_t>::const_iterator I = Offsets.begin(),
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E = Offsets.end(); I != E; ++I) {
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int64_t Offset = (uint64_t)*I + F.BaseOffset;
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for (int64_t O : Offsets) {
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int64_t Offset = (uint64_t)O + F.BaseOffset;
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if (F.BaseGV)
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ImmCost += 64; // Handle symbolic values conservatively.
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// TODO: This should probably be the pointer size.
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@ -1149,10 +1137,9 @@ void LSRFixup::print(raw_ostream &OS) const {
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OS << ", OperandValToReplace=";
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OperandValToReplace->printAsOperand(OS, /*PrintType=*/false);
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for (PostIncLoopSet::const_iterator I = PostIncLoops.begin(),
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E = PostIncLoops.end(); I != E; ++I) {
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for (const Loop *PIL : PostIncLoops) {
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OS << ", PostIncLoop=";
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(*I)->getHeader()->printAsOperand(OS, /*PrintType=*/false);
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PIL->getHeader()->printAsOperand(OS, /*PrintType=*/false);
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}
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if (LUIdx != ~size_t(0))
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@ -1298,9 +1285,8 @@ bool LSRUse::InsertFormula(const Formula &F) {
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assert((!F.ScaledReg || !F.ScaledReg->isZero()) &&
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"Zero allocated in a scaled register!");
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#ifndef NDEBUG
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for (SmallVectorImpl<const SCEV *>::const_iterator I =
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F.BaseRegs.begin(), E = F.BaseRegs.end(); I != E; ++I)
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assert(!(*I)->isZero() && "Zero allocated in a base register!");
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for (const SCEV *BaseReg : F.BaseRegs)
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assert(!BaseReg->isZero() && "Zero allocated in a base register!");
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#endif
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// Add the formula to the list.
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@ -1352,11 +1338,11 @@ void LSRUse::print(raw_ostream &OS) const {
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}
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OS << ", Offsets={";
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for (SmallVectorImpl<int64_t>::const_iterator I = Offsets.begin(),
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E = Offsets.end(); I != E; ++I) {
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OS << *I;
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if (std::next(I) != E)
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OS << ',';
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bool NeedComma = false;
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for (int64_t O : Offsets) {
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if (NeedComma) OS << ',';
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OS << O;
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NeedComma = true;
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}
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OS << '}';
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@ -1920,12 +1906,12 @@ void LSRInstance::OptimizeShadowIV() {
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/// set the IV user and stride information and return true, otherwise return
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/// false.
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bool LSRInstance::FindIVUserForCond(ICmpInst *Cond, IVStrideUse *&CondUse) {
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for (IVUsers::iterator UI = IU.begin(), E = IU.end(); UI != E; ++UI)
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if (UI->getUser() == Cond) {
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for (IVStrideUse &U : IU)
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if (U.getUser() == Cond) {
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// NOTE: we could handle setcc instructions with multiple uses here, but
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// InstCombine does it as well for simple uses, it's not clear that it
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// occurs enough in real life to handle.
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CondUse = UI;
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CondUse = &U;
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return true;
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}
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return false;
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@ -2100,8 +2086,7 @@ LSRInstance::OptimizeLoopTermCond() {
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SmallVector<BasicBlock*, 8> ExitingBlocks;
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L->getExitingBlocks(ExitingBlocks);
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for (unsigned i = 0, e = ExitingBlocks.size(); i != e; ++i) {
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BasicBlock *ExitingBlock = ExitingBlocks[i];
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for (BasicBlock *ExitingBlock : ExitingBlocks) {
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// Get the terminating condition for the loop if possible. If we
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// can, we want to change it to use a post-incremented version of its
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@ -2344,9 +2329,7 @@ LSRInstance::FindUseWithSimilarFormula(const Formula &OrigF,
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LU.WidestFixupType == OrigLU.WidestFixupType &&
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LU.HasFormulaWithSameRegs(OrigF)) {
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// Scan through this use's formulae.
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for (SmallVectorImpl<Formula>::const_iterator I = LU.Formulae.begin(),
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E = LU.Formulae.end(); I != E; ++I) {
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const Formula &F = *I;
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for (const Formula &F : LU.Formulae) {
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// Check to see if this formula has the same registers and symbols
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// as OrigF.
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if (F.BaseRegs == OrigF.BaseRegs &&
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@ -2374,8 +2357,8 @@ void LSRInstance::CollectInterestingTypesAndFactors() {
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// Collect interesting types and strides.
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SmallVector<const SCEV *, 4> Worklist;
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for (IVUsers::const_iterator UI = IU.begin(), E = IU.end(); UI != E; ++UI) {
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const SCEV *Expr = IU.getExpr(*UI);
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for (const IVStrideUse &U : IU) {
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const SCEV *Expr = IU.getExpr(U);
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// Collect interesting types.
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Types.insert(SE.getEffectiveSCEVType(Expr->getType()));
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@ -2578,25 +2561,23 @@ isProfitableChain(IVChain &Chain, SmallPtrSetImpl<Instruction*> &Users,
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unsigned NumConstIncrements = 0;
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unsigned NumVarIncrements = 0;
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unsigned NumReusedIncrements = 0;
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for (IVChain::const_iterator I = Chain.begin(), E = Chain.end();
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I != E; ++I) {
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if (I->IncExpr->isZero())
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for (const IVInc &Inc : Chain) {
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if (Inc.IncExpr->isZero())
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continue;
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// Incrementing by zero or some constant is neutral. We assume constants can
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// be folded into an addressing mode or an add's immediate operand.
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if (isa<SCEVConstant>(I->IncExpr)) {
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if (isa<SCEVConstant>(Inc.IncExpr)) {
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++NumConstIncrements;
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continue;
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}
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if (I->IncExpr == LastIncExpr)
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if (Inc.IncExpr == LastIncExpr)
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++NumReusedIncrements;
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else
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++NumVarIncrements;
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LastIncExpr = I->IncExpr;
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LastIncExpr = Inc.IncExpr;
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}
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// An IV chain with a single increment is handled by LSR's postinc
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// uses. However, a chain with multiple increments requires keeping the IV's
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@ -2831,12 +2812,11 @@ void LSRInstance::FinalizeChain(IVChain &Chain) {
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assert(!Chain.Incs.empty() && "empty IV chains are not allowed");
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DEBUG(dbgs() << "Final Chain: " << *Chain.Incs[0].UserInst << "\n");
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for (IVChain::const_iterator I = Chain.begin(), E = Chain.end();
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I != E; ++I) {
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DEBUG(dbgs() << " Inc: " << *I->UserInst << "\n");
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User::op_iterator UseI =
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std::find(I->UserInst->op_begin(), I->UserInst->op_end(), I->IVOperand);
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assert(UseI != I->UserInst->op_end() && "cannot find IV operand");
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for (const IVInc &Inc : Chain) {
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DEBUG(dbgs() << " Inc: " << Inc.UserInst << "\n");
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auto UseI = std::find(Inc.UserInst->op_begin(), Inc.UserInst->op_end(),
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Inc.IVOperand);
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assert(UseI != Inc.UserInst->op_end() && "cannot find IV operand");
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IVIncSet.insert(UseI);
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}
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}
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@ -2899,20 +2879,18 @@ void LSRInstance::GenerateIVChain(const IVChain &Chain, SCEVExpander &Rewriter,
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Type *IVTy = IVSrc->getType();
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Type *IntTy = SE.getEffectiveSCEVType(IVTy);
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const SCEV *LeftOverExpr = nullptr;
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for (IVChain::const_iterator IncI = Chain.begin(),
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IncE = Chain.end(); IncI != IncE; ++IncI) {
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Instruction *InsertPt = IncI->UserInst;
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for (const IVInc &Inc : Chain) {
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Instruction *InsertPt = Inc.UserInst;
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if (isa<PHINode>(InsertPt))
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InsertPt = L->getLoopLatch()->getTerminator();
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// IVOper will replace the current IV User's operand. IVSrc is the IV
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// value currently held in a register.
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Value *IVOper = IVSrc;
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if (!IncI->IncExpr->isZero()) {
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if (!Inc.IncExpr->isZero()) {
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// IncExpr was the result of subtraction of two narrow values, so must
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// be signed.
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const SCEV *IncExpr = SE.getNoopOrSignExtend(IncI->IncExpr, IntTy);
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const SCEV *IncExpr = SE.getNoopOrSignExtend(Inc.IncExpr, IntTy);
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LeftOverExpr = LeftOverExpr ?
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SE.getAddExpr(LeftOverExpr, IncExpr) : IncExpr;
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}
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@ -2925,22 +2903,21 @@ void LSRInstance::GenerateIVChain(const IVChain &Chain, SCEVExpander &Rewriter,
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IVOper = Rewriter.expandCodeFor(IVOperExpr, IVTy, InsertPt);
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// If an IV increment can't be folded, use it as the next IV value.
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if (!canFoldIVIncExpr(LeftOverExpr, IncI->UserInst, IncI->IVOperand,
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TTI)) {
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if (!canFoldIVIncExpr(LeftOverExpr, Inc.UserInst, Inc.IVOperand, TTI)) {
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assert(IVTy == IVOper->getType() && "inconsistent IV increment type");
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IVSrc = IVOper;
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LeftOverExpr = nullptr;
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}
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}
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Type *OperTy = IncI->IVOperand->getType();
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Type *OperTy = Inc.IVOperand->getType();
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if (IVTy != OperTy) {
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assert(SE.getTypeSizeInBits(IVTy) >= SE.getTypeSizeInBits(OperTy) &&
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"cannot extend a chained IV");
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IRBuilder<> Builder(InsertPt);
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IVOper = Builder.CreateTruncOrBitCast(IVOper, OperTy, "lsr.chain");
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}
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IncI->UserInst->replaceUsesOfWith(IncI->IVOperand, IVOper);
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DeadInsts.push_back(IncI->IVOperand);
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Inc.UserInst->replaceUsesOfWith(Inc.IVOperand, IVOper);
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DeadInsts.push_back(Inc.IVOperand);
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}
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// If LSR created a new, wider phi, we may also replace its postinc. We only
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// do this if we also found a wide value for the head of the chain.
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@ -2968,11 +2945,11 @@ void LSRInstance::GenerateIVChain(const IVChain &Chain, SCEVExpander &Rewriter,
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}
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void LSRInstance::CollectFixupsAndInitialFormulae() {
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for (IVUsers::const_iterator UI = IU.begin(), E = IU.end(); UI != E; ++UI) {
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Instruction *UserInst = UI->getUser();
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for (const IVStrideUse &U : IU) {
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Instruction *UserInst = U.getUser();
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// Skip IV users that are part of profitable IV Chains.
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User::op_iterator UseI = std::find(UserInst->op_begin(), UserInst->op_end(),
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UI->getOperandValToReplace());
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U.getOperandValToReplace());
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assert(UseI != UserInst->op_end() && "cannot find IV operand");
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if (IVIncSet.count(UseI))
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continue;
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@ -2980,8 +2957,8 @@ void LSRInstance::CollectFixupsAndInitialFormulae() {
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// Record the uses.
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LSRFixup &LF = getNewFixup();
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LF.UserInst = UserInst;
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LF.OperandValToReplace = UI->getOperandValToReplace();
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LF.PostIncLoops = UI->getPostIncLoops();
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LF.OperandValToReplace = U.getOperandValToReplace();
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LF.PostIncLoops = U.getPostIncLoops();
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LSRUse::KindType Kind = LSRUse::Basic;
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Type *AccessTy = nullptr;
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@ -2990,7 +2967,7 @@ void LSRInstance::CollectFixupsAndInitialFormulae() {
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AccessTy = getAccessType(LF.UserInst);
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}
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const SCEV *S = IU.getExpr(*UI);
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const SCEV *S = IU.getExpr(U);
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// Equality (== and !=) ICmps are special. We can rewrite (i == N) as
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// (N - i == 0), and this allows (N - i) to be the expression that we work
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@ -3082,9 +3059,8 @@ LSRInstance::InsertSupplementalFormula(const SCEV *S,
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void LSRInstance::CountRegisters(const Formula &F, size_t LUIdx) {
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if (F.ScaledReg)
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RegUses.CountRegister(F.ScaledReg, LUIdx);
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for (SmallVectorImpl<const SCEV *>::const_iterator I = F.BaseRegs.begin(),
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E = F.BaseRegs.end(); I != E; ++I)
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RegUses.CountRegister(*I, LUIdx);
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for (const SCEV *BaseReg : F.BaseRegs)
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RegUses.CountRegister(BaseReg, LUIdx);
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}
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/// InsertFormula - If the given formula has not yet been inserted, add it to
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@ -3205,9 +3181,8 @@ static const SCEV *CollectSubexprs(const SCEV *S, const SCEVConstant *C,
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if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
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// Break out add operands.
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for (SCEVAddExpr::op_iterator I = Add->op_begin(), E = Add->op_end();
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I != E; ++I) {
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const SCEV *Remainder = CollectSubexprs(*I, C, Ops, L, SE, Depth+1);
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for (const SCEV *S : Add->operands()) {
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const SCEV *Remainder = CollectSubexprs(S, C, Ops, L, SE, Depth+1);
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if (Remainder)
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Ops.push_back(C ? SE.getMulExpr(C, Remainder) : Remainder);
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}
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@ -3365,9 +3340,7 @@ void LSRInstance::GenerateCombinations(LSRUse &LU, unsigned LUIdx,
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Formula F = Base;
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F.BaseRegs.clear();
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SmallVector<const SCEV *, 4> Ops;
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for (SmallVectorImpl<const SCEV *>::const_iterator
|
||||
I = Base.BaseRegs.begin(), E = Base.BaseRegs.end(); I != E; ++I) {
|
||||
const SCEV *BaseReg = *I;
|
||||
for (const SCEV *BaseReg : Base.BaseRegs) {
|
||||
if (SE.properlyDominates(BaseReg, L->getHeader()) &&
|
||||
!SE.hasComputableLoopEvolution(BaseReg, L))
|
||||
Ops.push_back(BaseReg);
|
||||
@ -3424,15 +3397,13 @@ void LSRInstance::GenerateConstantOffsetsImpl(
|
||||
LSRUse &LU, unsigned LUIdx, const Formula &Base,
|
||||
const SmallVectorImpl<int64_t> &Worklist, size_t Idx, bool IsScaledReg) {
|
||||
const SCEV *G = IsScaledReg ? Base.ScaledReg : Base.BaseRegs[Idx];
|
||||
for (SmallVectorImpl<int64_t>::const_iterator I = Worklist.begin(),
|
||||
E = Worklist.end();
|
||||
I != E; ++I) {
|
||||
for (int64_t Offset : Worklist) {
|
||||
Formula F = Base;
|
||||
F.BaseOffset = (uint64_t)Base.BaseOffset - *I;
|
||||
if (isLegalUse(TTI, LU.MinOffset - *I, LU.MaxOffset - *I, LU.Kind,
|
||||
F.BaseOffset = (uint64_t)Base.BaseOffset - Offset;
|
||||
if (isLegalUse(TTI, LU.MinOffset - Offset, LU.MaxOffset - Offset, LU.Kind,
|
||||
LU.AccessTy, F)) {
|
||||
// Add the offset to the base register.
|
||||
const SCEV *NewG = SE.getAddExpr(SE.getConstant(G->getType(), *I), G);
|
||||
const SCEV *NewG = SE.getAddExpr(SE.getConstant(G->getType(), Offset), G);
|
||||
// If it cancelled out, drop the base register, otherwise update it.
|
||||
if (NewG->isZero()) {
|
||||
if (IsScaledReg) {
|
||||
@ -3498,10 +3469,7 @@ void LSRInstance::GenerateICmpZeroScales(LSRUse &LU, unsigned LUIdx,
|
||||
assert(!Base.BaseGV && "ICmpZero use is not legal!");
|
||||
|
||||
// Check each interesting stride.
|
||||
for (SmallSetVector<int64_t, 8>::const_iterator
|
||||
I = Factors.begin(), E = Factors.end(); I != E; ++I) {
|
||||
int64_t Factor = *I;
|
||||
|
||||
for (int64_t Factor : Factors) {
|
||||
// Check that the multiplication doesn't overflow.
|
||||
if (Base.BaseOffset == INT64_MIN && Factor == -1)
|
||||
continue;
|
||||
@ -3585,10 +3553,7 @@ void LSRInstance::GenerateScales(LSRUse &LU, unsigned LUIdx, Formula Base) {
|
||||
assert(Base.Scale == 0 && "Unscale did not did its job!");
|
||||
|
||||
// Check each interesting stride.
|
||||
for (SmallSetVector<int64_t, 8>::const_iterator
|
||||
I = Factors.begin(), E = Factors.end(); I != E; ++I) {
|
||||
int64_t Factor = *I;
|
||||
|
||||
for (int64_t Factor : Factors) {
|
||||
Base.Scale = Factor;
|
||||
Base.HasBaseReg = Base.BaseRegs.size() > 1;
|
||||
// Check whether this scale is going to be legal.
|
||||
@ -3644,16 +3609,13 @@ void LSRInstance::GenerateTruncates(LSRUse &LU, unsigned LUIdx, Formula Base) {
|
||||
if (!DstTy) return;
|
||||
DstTy = SE.getEffectiveSCEVType(DstTy);
|
||||
|
||||
for (SmallSetVector<Type *, 4>::const_iterator
|
||||
I = Types.begin(), E = Types.end(); I != E; ++I) {
|
||||
Type *SrcTy = *I;
|
||||
for (Type *SrcTy : Types) {
|
||||
if (SrcTy != DstTy && TTI.isTruncateFree(SrcTy, DstTy)) {
|
||||
Formula F = Base;
|
||||
|
||||
if (F.ScaledReg) F.ScaledReg = SE.getAnyExtendExpr(F.ScaledReg, *I);
|
||||
for (SmallVectorImpl<const SCEV *>::iterator J = F.BaseRegs.begin(),
|
||||
JE = F.BaseRegs.end(); J != JE; ++J)
|
||||
*J = SE.getAnyExtendExpr(*J, SrcTy);
|
||||
if (F.ScaledReg) F.ScaledReg = SE.getAnyExtendExpr(F.ScaledReg, SrcTy);
|
||||
for (const SCEV *&BaseReg : F.BaseRegs)
|
||||
BaseReg = SE.getAnyExtendExpr(BaseReg, SrcTy);
|
||||
|
||||
// TODO: This assumes we've done basic processing on all uses and
|
||||
// have an idea what the register usage is.
|
||||
@ -3700,20 +3662,17 @@ void WorkItem::dump() const {
|
||||
void LSRInstance::GenerateCrossUseConstantOffsets() {
|
||||
// Group the registers by their value without any added constant offset.
|
||||
typedef std::map<int64_t, const SCEV *> ImmMapTy;
|
||||
typedef DenseMap<const SCEV *, ImmMapTy> RegMapTy;
|
||||
RegMapTy Map;
|
||||
DenseMap<const SCEV *, ImmMapTy> Map;
|
||||
DenseMap<const SCEV *, SmallBitVector> UsedByIndicesMap;
|
||||
SmallVector<const SCEV *, 8> Sequence;
|
||||
for (RegUseTracker::const_iterator I = RegUses.begin(), E = RegUses.end();
|
||||
I != E; ++I) {
|
||||
const SCEV *Reg = *I;
|
||||
for (const SCEV *Use : RegUses) {
|
||||
const SCEV *Reg = Use; // Make a copy for ExtractImmediate to modify.
|
||||
int64_t Imm = ExtractImmediate(Reg, SE);
|
||||
std::pair<RegMapTy::iterator, bool> Pair =
|
||||
Map.insert(std::make_pair(Reg, ImmMapTy()));
|
||||
auto Pair = Map.insert(std::make_pair(Reg, ImmMapTy()));
|
||||
if (Pair.second)
|
||||
Sequence.push_back(Reg);
|
||||
Pair.first->second.insert(std::make_pair(Imm, *I));
|
||||
UsedByIndicesMap[Reg] |= RegUses.getUsedByIndices(*I);
|
||||
Pair.first->second.insert(std::make_pair(Imm, Use));
|
||||
UsedByIndicesMap[Reg] |= RegUses.getUsedByIndices(Use);
|
||||
}
|
||||
|
||||
// Now examine each set of registers with the same base value. Build up
|
||||
@ -3721,9 +3680,7 @@ void LSRInstance::GenerateCrossUseConstantOffsets() {
|
||||
// not adding formulae and register counts while we're searching.
|
||||
SmallVector<WorkItem, 32> WorkItems;
|
||||
SmallSet<std::pair<size_t, int64_t>, 32> UniqueItems;
|
||||
for (SmallVectorImpl<const SCEV *>::const_iterator I = Sequence.begin(),
|
||||
E = Sequence.end(); I != E; ++I) {
|
||||
const SCEV *Reg = *I;
|
||||
for (const SCEV *Reg : Sequence) {
|
||||
const ImmMapTy &Imms = Map.find(Reg)->second;
|
||||
|
||||
// It's not worthwhile looking for reuse if there's only one offset.
|
||||
@ -3731,9 +3688,8 @@ void LSRInstance::GenerateCrossUseConstantOffsets() {
|
||||
continue;
|
||||
|
||||
DEBUG(dbgs() << "Generating cross-use offsets for " << *Reg << ':';
|
||||
for (ImmMapTy::const_iterator J = Imms.begin(), JE = Imms.end();
|
||||
J != JE; ++J)
|
||||
dbgs() << ' ' << J->first;
|
||||
for (const auto &Entry : Imms)
|
||||
dbgs() << ' ' << Entry.first;
|
||||
dbgs() << '\n');
|
||||
|
||||
// Examine each offset.
|
||||
@ -3778,9 +3734,7 @@ void LSRInstance::GenerateCrossUseConstantOffsets() {
|
||||
UniqueItems.clear();
|
||||
|
||||
// Now iterate through the worklist and add new formulae.
|
||||
for (SmallVectorImpl<WorkItem>::const_iterator I = WorkItems.begin(),
|
||||
E = WorkItems.end(); I != E; ++I) {
|
||||
const WorkItem &WI = *I;
|
||||
for (const WorkItem &WI : WorkItems) {
|
||||
size_t LUIdx = WI.LUIdx;
|
||||
LSRUse &LU = Uses[LUIdx];
|
||||
int64_t Imm = WI.Imm;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user