From 00552e3875ee5f382db6c98286a241a7d0efe1b8 Mon Sep 17 00:00:00 2001 From: Michael Kuperstein Date: Sun, 19 Jul 2015 11:03:08 +0000 Subject: [PATCH] [X86] Add support for tbyte memory operand size for Intel-syntax x86 assembly Differential Revision: http://reviews.llvm.org/D11257 Patch by: marina.yatsina@intel.com git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242639 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/AsmParser/X86AsmParser.cpp | 1 + test/MC/X86/intel-syntax.s | 2 ++ 2 files changed, 3 insertions(+) diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp index 418f0431e1d..e9adfd27935 100644 --- a/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -1028,6 +1028,7 @@ static unsigned getIntelMemOperandSize(StringRef OpStr) { .Cases("DWORD", "dword", 32) .Cases("QWORD", "qword", 64) .Cases("XWORD", "xword", 80) + .Cases("TBYTE", "tbyte", 80) .Cases("XMMWORD", "xmmword", 128) .Cases("YMMWORD", "ymmword", 256) .Cases("ZMMWORD", "zmmword", 512) diff --git a/test/MC/X86/intel-syntax.s b/test/MC/X86/intel-syntax.s index 30fe6c8b9b1..04264083bf2 100644 --- a/test/MC/X86/intel-syntax.s +++ b/test/MC/X86/intel-syntax.s @@ -635,10 +635,12 @@ add byte ptr [rax], 1 // CHECK: addw $1, (%rax) // CHECK: addb $1, (%rax) +fstp tbyte ptr [rax] fstp xword ptr [rax] fstp qword ptr [rax] fstp dword ptr [rax] // CHECK: fstpt (%rax) +// CHECK: fstpt (%rax) // CHECK: fstpl (%rax) // CHECK: fstps (%rax)