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[ARM64-BE] Teach fast-isel about how to set up sub-word stack arguments for big endian calls.
SelectionDAG already knows about this, but fast-isel was ignorant. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208307 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1250,10 +1250,16 @@ bool ARM64FastISel::ProcessCallArgs(SmallVectorImpl<Value *> &Args,
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assert(VA.isMemLoc() && "Assuming store on stack.");
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// Need to store on the stack.
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unsigned ArgSize = VA.getLocVT().getSizeInBits() / 8;
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unsigned BEAlign = 0;
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if (ArgSize < 8 && !Subtarget->isLittleEndian())
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BEAlign = 8 - ArgSize;
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Address Addr;
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Addr.setKind(Address::RegBase);
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Addr.setReg(ARM64::SP);
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Addr.setOffset(VA.getLocMemOffset());
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Addr.setOffset(VA.getLocMemOffset() + BEAlign);
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if (!EmitStore(ArgVT, Arg, Addr))
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return false;
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@ -1,4 +1,5 @@
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; RUN: llc < %s -O0 -fast-isel-abort -mtriple=arm64-apple-darwin | FileCheck %s
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; RUN: llc < %s -O0 -fast-isel-abort -mtriple=arm64_be-linux-gnu | FileCheck %s --check-prefix=CHECK-BE
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define void @call0() nounwind {
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entry:
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@ -89,3 +90,11 @@ entry:
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}
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declare i32 @func2(i64 zeroext, i32 signext, i16 zeroext, i8 signext, i1 zeroext, i1 zeroext)
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declare void @callee_b0f(i8 %bp10, i8 %bp11, i8 %bp12, i8 %bp13, i8 %bp14, i8 %bp15, i8 %bp17, i8 %bp18, i8 %bp19)
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define void @caller_b1f() {
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entry:
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; CHECK-BE: strb w{{.*}}, [sp, #7]
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call void @callee_b0f(i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 42)
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ret void
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}
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