Use uint16_t to store registers in callee saved register tables to reduce size of static data.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151996 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper
2012-03-04 03:33:22 +00:00
parent 991271d9c4
commit 015f228861
33 changed files with 55 additions and 55 deletions

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@@ -98,10 +98,10 @@ PPCRegisterInfo::getPointerRegClass(unsigned Kind) const {
return &PPC::GPRCRegClass;
}
const unsigned*
const uint16_t*
PPCRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
// 32-bit Darwin calling convention.
static const unsigned Darwin32_CalleeSavedRegs[] = {
static const uint16_t Darwin32_CalleeSavedRegs[] = {
PPC::R13, PPC::R14, PPC::R15,
PPC::R16, PPC::R17, PPC::R18, PPC::R19,
PPC::R20, PPC::R21, PPC::R22, PPC::R23,
@@ -123,7 +123,7 @@ PPCRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
};
// 32-bit SVR4 calling convention.
static const unsigned SVR4_CalleeSavedRegs[] = {
static const uint16_t SVR4_CalleeSavedRegs[] = {
PPC::R14, PPC::R15,
PPC::R16, PPC::R17, PPC::R18, PPC::R19,
PPC::R20, PPC::R21, PPC::R22, PPC::R23,
@@ -147,7 +147,7 @@ PPCRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
0
};
// 64-bit Darwin calling convention.
static const unsigned Darwin64_CalleeSavedRegs[] = {
static const uint16_t Darwin64_CalleeSavedRegs[] = {
PPC::X14, PPC::X15,
PPC::X16, PPC::X17, PPC::X18, PPC::X19,
PPC::X20, PPC::X21, PPC::X22, PPC::X23,
@@ -169,7 +169,7 @@ PPCRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
};
// 64-bit SVR4 calling convention.
static const unsigned SVR4_64_CalleeSavedRegs[] = {
static const uint16_t SVR4_64_CalleeSavedRegs[] = {
PPC::X14, PPC::X15,
PPC::X16, PPC::X17, PPC::X18, PPC::X19,
PPC::X20, PPC::X21, PPC::X22, PPC::X23,

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@@ -41,7 +41,7 @@ public:
MachineFunction &MF) const;
/// Code Generation virtual methods...
const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
const uint16_t *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
BitVector getReservedRegs(const MachineFunction &MF) const;