Use simple RegState::Define flag instead of getDefRegState(true).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116601 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bob Wilson 2010-10-15 18:25:59 +00:00
parent de89b010b0
commit 01b35c25de

View File

@ -586,7 +586,7 @@ bool ARMExpandPseudo::ExpandMBB(MachineBasicBlock &MBB) {
.addReg(0)
.addImm(ARM_AM::getSORegOpc((Opcode == ARM::MOVsrl_flag ? ARM_AM::lsr
: ARM_AM::asr), 1)))
.addReg(ARM::CPSR, getDefRegState(true));
.addReg(ARM::CPSR, RegState::Define);
MI.eraseFromParent();
break;
}
@ -616,7 +616,7 @@ bool ARMExpandPseudo::ExpandMBB(MachineBasicBlock &MBB) {
(*MIB1).setMemRefs(MI.memoperands_begin(), MI.memoperands_end());
MachineInstrBuilder MIB2 = BuildMI(MBB, MBBI, MI.getDebugLoc(),
TII->get(ARM::tPICADD))
.addReg(DstReg, getDefRegState(true) | getDeadRegState(DstIsDead))
.addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead))
.addReg(DstReg)
.addOperand(MI.getOperand(2));
TransferImpOps(MI, MIB1, MIB2);
@ -640,7 +640,7 @@ bool ARMExpandPseudo::ExpandMBB(MachineBasicBlock &MBB) {
HI16 = BuildMI(MBB, MBBI, MI.getDebugLoc(),
TII->get(Opcode == ARM::MOVi32imm ?
ARM::MOVTi16 : ARM::t2MOVTi16))
.addReg(DstReg, getDefRegState(true) | getDeadRegState(DstIsDead))
.addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead))
.addReg(DstReg);
if (MO.isImm()) {
@ -677,13 +677,13 @@ bool ARMExpandPseudo::ExpandMBB(MachineBasicBlock &MBB) {
AddDefaultPred(BuildMI(MBB, MBBI, MI.getDebugLoc(),
TII->get(ARM::VMOVQ))
.addReg(EvenDst,
getDefRegState(true) | getDeadRegState(DstIsDead))
RegState::Define | getDeadRegState(DstIsDead))
.addReg(EvenSrc, getKillRegState(SrcIsKill)));
MachineInstrBuilder Odd =
AddDefaultPred(BuildMI(MBB, MBBI, MI.getDebugLoc(),
TII->get(ARM::VMOVQ))
.addReg(OddDst,
getDefRegState(true) | getDeadRegState(DstIsDead))
RegState::Define | getDeadRegState(DstIsDead))
.addReg(OddSrc, getKillRegState(SrcIsKill)));
TransferImpOps(MI, Even, Odd);
MI.eraseFromParent();