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Mark x86 _alt instructions as AsmParserOnly so they will be omitted from disassembler without string matches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198545 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -701,7 +701,7 @@ multiclass avx512_cmp_scalar<RegisterClass RC, X86MemOperand x86memop,
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(outs VK1:$dst), (ins RC:$src1, x86memop:$src2, CC:$cc), asm,
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[(set VK1:$dst, (OpNode (VT RC:$src1),
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(ld_frag addr:$src2), imm:$cc))], IIC_SSE_ALU_F32P_RM>, EVEX_4V;
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let neverHasSideEffects = 1 in {
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let isAsmParserOnly = 1, hasSideEffects = 0 in {
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def rri_alt : AVX512Ii8<0xC2, MRMSrcReg,
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(outs VK1:$dst), (ins RC:$src1, RC:$src2, i8imm:$cc),
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asm_alt, [], IIC_SSE_ALU_F32S_RR>, EVEX_4V;
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@ -770,7 +770,7 @@ multiclass avx512_icmp_cc<bits<8> opc, RegisterClass KRC,
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[(set KRC:$dst, (OpNode (vt RC:$src1), (memop_frag addr:$src2),
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imm:$cc))], IIC_SSE_ALU_F32P_RM>, EVEX_4V;
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// Accept explicit immediate argument form instead of comparison code.
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let neverHasSideEffects = 1 in {
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let isAsmParserOnly = 1, hasSideEffects = 0 in {
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def rri_alt : AVX512AIi8<opc, MRMSrcReg,
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(outs KRC:$dst), (ins RC:$src1, RC:$src2, i8imm:$cc),
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asm_alt, [], IIC_SSE_ALU_F32P_RR>, EVEX_4V;
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@ -824,7 +824,7 @@ multiclass avx512_cmp_packed<RegisterClass KRC, RegisterClass RC,
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(X86cmpm (vt RC:$src1), (memop addr:$src2), imm:$cc))], d>;
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// Accept explicit immediate argument form instead of comparison code.
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let neverHasSideEffects = 1 in {
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let isAsmParserOnly = 1, hasSideEffects = 0 in {
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def rri_alt : AVX512PIi8<0xC2, MRMSrcReg,
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(outs RC:$dst), (ins RC:$src1, RC:$src2, i8imm:$cc),
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!strconcat("vcmp", suffix,
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@ -2299,7 +2299,7 @@ multiclass sse12_cmp_scalar<RegisterClass RC, X86MemOperand x86memop,
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Sched<[itins.Sched.Folded, ReadAfterLd]>;
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// Accept explicit immediate argument form instead of comparison code.
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let neverHasSideEffects = 1 in {
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let isAsmParserOnly = 1, hasSideEffects = 0 in {
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def rr_alt : SIi8<0xC2, MRMSrcReg, (outs RC:$dst),
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(ins RC:$src1, RC:$src2, i8imm:$cc), asm_alt, [],
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IIC_SSE_ALU_F32S_RR>, Sched<[itins.Sched]>;
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@ -2454,7 +2454,7 @@ multiclass sse12_cmp_packed<RegisterClass RC, X86MemOperand x86memop,
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Sched<[WriteFAddLd, ReadAfterLd]>;
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// Accept explicit immediate argument form instead of comparison code.
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let neverHasSideEffects = 1 in {
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let isAsmParserOnly = 1, hasSideEffects = 0 in {
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def rri_alt : PIi8<0xC2, MRMSrcReg,
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(outs RC:$dst), (ins RC:$src1, RC:$src2, i8imm:$cc),
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asm_alt, [], itins.rr, d>, Sched<[WriteFAdd]>;
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@ -508,8 +508,7 @@ RecognizableInstr::filter_ret RecognizableInstr::filter() const {
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return FILTER_WEAK;
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// Filter out alternate forms of AVX instructions
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if (Name.find("_alt") != Name.npos ||
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(Name.find("r64r") != Name.npos && Name.find("r64r64") == Name.npos && Name.find("r64r8") == Name.npos) ||
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if ((Name.find("r64r") != Name.npos && Name.find("r64r64") == Name.npos && Name.find("r64r8") == Name.npos) ||
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Name.find("_64mr") != Name.npos ||
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Name.find("rr64") != Name.npos)
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return FILTER_WEAK;
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