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https://github.com/c64scene-ar/llvm-6502.git
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Revert 95130.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95160 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1168,7 +1168,7 @@ public:
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/// InVals array with legal-type return values from the call, and return
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/// the resulting token chain value.
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virtual SDValue
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LowerCall(SDValue Chain, SDValue Callee, const Type *RetTy,
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LowerCall(SDValue Chain, SDValue Callee,
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CallingConv::ID CallConv, bool isVarArg, bool &isTailCall,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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const SmallVectorImpl<ISD::InputArg> &Ins,
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@ -5735,7 +5735,7 @@ TargetLowering::LowerCallTo(SDValue Chain, const Type *RetTy,
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}
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SmallVector<SDValue, 4> InVals;
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Chain = LowerCall(Chain, Callee, RetTy, CallConv, isVarArg, isTailCall,
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Chain = LowerCall(Chain, Callee, CallConv, isVarArg, isTailCall,
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Outs, Ins, dl, DAG, InVals);
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// Verify that the target's LowerCall behaved as expected.
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@ -895,7 +895,7 @@ void ARMTargetLowering::PassF64ArgInRegs(DebugLoc dl, SelectionDAG &DAG,
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/// ARMISD:CALL <- callseq_end chain. Also add input and output parameter
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/// nodes.
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SDValue
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ARMTargetLowering::LowerCall(SDValue Chain, SDValue Callee, const Type *RetTy,
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ARMTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
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CallingConv::ID CallConv, bool isVarArg,
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bool &isTailCall,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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@ -317,7 +317,7 @@ namespace llvm {
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SmallVectorImpl<SDValue> &InVals);
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virtual SDValue
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LowerCall(SDValue Chain, SDValue Callee, const Type *RetTy,
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LowerCall(SDValue Chain, SDValue Callee,
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CallingConv::ID CallConv, bool isVarArg,
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bool &isTailCall,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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@ -219,7 +219,7 @@ static SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) {
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#include "AlphaGenCallingConv.inc"
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SDValue
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AlphaTargetLowering::LowerCall(SDValue Chain, SDValue Callee, const Type *RetTy,
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AlphaTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
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CallingConv::ID CallConv, bool isVarArg,
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bool &isTailCall,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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@ -120,7 +120,7 @@ namespace llvm {
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SmallVectorImpl<SDValue> &InVals);
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virtual SDValue
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LowerCall(SDValue Chain, SDValue Callee, const Type *RetTy,
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LowerCall(SDValue Chain, SDValue Callee,
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CallingConv::ID CallConv, bool isVarArg, bool &isTailCall,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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const SmallVectorImpl<ISD::InputArg> &Ins,
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@ -272,7 +272,6 @@ BlackfinTargetLowering::LowerReturn(SDValue Chain,
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SDValue
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BlackfinTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
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const Type *RetTy,
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CallingConv::ID CallConv, bool isVarArg,
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bool &isTailCall,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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@ -63,7 +63,7 @@ namespace llvm {
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DebugLoc dl, SelectionDAG &DAG,
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SmallVectorImpl<SDValue> &InVals);
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virtual SDValue
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LowerCall(SDValue Chain, SDValue Callee, const Type *RetTy,
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LowerCall(SDValue Chain, SDValue Callee,
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CallingConv::ID CallConv, bool isVarArg, bool &isTailCall,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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const SmallVectorImpl<ISD::InputArg> &Ins,
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@ -1138,7 +1138,7 @@ static SDNode *isLSAAddress(SDValue Op, SelectionDAG &DAG) {
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}
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SDValue
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SPUTargetLowering::LowerCall(SDValue Chain, SDValue Callee, const Type *RetTy,
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SPUTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
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CallingConv::ID CallConv, bool isVarArg,
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bool &isTailCall,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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@ -156,7 +156,7 @@ namespace llvm {
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SmallVectorImpl<SDValue> &InVals);
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virtual SDValue
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LowerCall(SDValue Chain, SDValue Callee, const Type *RetTy,
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LowerCall(SDValue Chain, SDValue Callee,
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CallingConv::ID CallConv, bool isVarArg,
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bool &isTailCall,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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@ -271,7 +271,7 @@ MSP430TargetLowering::LowerFormalArguments(SDValue Chain,
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}
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SDValue
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MSP430TargetLowering::LowerCall(SDValue Chain, SDValue Callee,const Type *RetTy,
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MSP430TargetLowering::LowerCall(SDValue Chain, SDValue Callee,
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CallingConv::ID CallConv, bool isVarArg,
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bool &isTailCall,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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@ -153,7 +153,7 @@ namespace llvm {
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DebugLoc dl, SelectionDAG &DAG,
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SmallVectorImpl<SDValue> &InVals);
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virtual SDValue
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LowerCall(SDValue Chain, SDValue Callee, const Type *RetTy,
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LowerCall(SDValue Chain, SDValue Callee,
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CallingConv::ID CallConv, bool isVarArg, bool &isTailCall,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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const SmallVectorImpl<ISD::InputArg> &Ins,
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@ -684,7 +684,7 @@ static bool CC_MipsO32(unsigned ValNo, EVT ValVT,
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/// (physical regs)/(stack frame), CALLSEQ_START and CALLSEQ_END are emitted.
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/// TODO: isVarArg, isTailCall.
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SDValue
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MipsTargetLowering::LowerCall(SDValue Chain, SDValue Callee, const Type *RetTy,
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MipsTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
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CallingConv::ID CallConv, bool isVarArg,
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bool &isTailCall,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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@ -116,7 +116,7 @@ namespace llvm {
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SmallVectorImpl<SDValue> &InVals);
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virtual SDValue
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LowerCall(SDValue Chain, SDValue Callee, const Type *RetTy,
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LowerCall(SDValue Chain, SDValue Callee,
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CallingConv::ID CallConv, bool isVarArg,
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bool &isTailCall,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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@ -1353,7 +1353,7 @@ GetDataAddress(DebugLoc dl, SDValue Callee, SDValue &Chain,
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}
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SDValue
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PIC16TargetLowering::LowerCall(SDValue Chain, SDValue Callee, const Type *RetTy,
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PIC16TargetLowering::LowerCall(SDValue Chain, SDValue Callee,
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CallingConv::ID CallConv, bool isVarArg,
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bool &isTailCall,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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@ -142,7 +142,7 @@ namespace llvm {
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SmallVectorImpl<SDValue> &InVals);
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virtual SDValue
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LowerCall(SDValue Chain, SDValue Callee, const Type *RetTy,
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LowerCall(SDValue Chain, SDValue Callee,
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CallingConv::ID CallConv, bool isVarArg, bool &isTailCall,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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const SmallVectorImpl<ISD::InputArg> &Ins,
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@ -2674,7 +2674,7 @@ PPCTargetLowering::FinishCall(CallingConv::ID CallConv, DebugLoc dl,
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}
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SDValue
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PPCTargetLowering::LowerCall(SDValue Chain, SDValue Callee, const Type *RetTy,
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PPCTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
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CallingConv::ID CallConv, bool isVarArg,
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bool &isTailCall,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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@ -430,7 +430,7 @@ namespace llvm {
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SmallVectorImpl<SDValue> &InVals);
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virtual SDValue
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LowerCall(SDValue Chain, SDValue Callee, const Type *RetTy,
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LowerCall(SDValue Chain, SDValue Callee,
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CallingConv::ID CallConv, bool isVarArg, bool &isTailCall,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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const SmallVectorImpl<ISD::InputArg> &Ins,
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@ -250,7 +250,7 @@ SparcTargetLowering::LowerFormalArguments(SDValue Chain,
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}
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SDValue
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SparcTargetLowering::LowerCall(SDValue Chain, SDValue Callee, const Type *RetTy,
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SparcTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
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CallingConv::ID CallConv, bool isVarArg,
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bool &isTailCall,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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@ -85,7 +85,7 @@ namespace llvm {
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SmallVectorImpl<SDValue> &InVals);
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virtual SDValue
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LowerCall(SDValue Chain, SDValue Callee, const Type *RetTy,
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LowerCall(SDValue Chain, SDValue Callee,
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CallingConv::ID CallConv, bool isVarArg,
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bool &isTailCall,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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@ -249,7 +249,6 @@ SystemZTargetLowering::LowerFormalArguments(SDValue Chain,
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SDValue
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SystemZTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
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const Type *RetTy,
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CallingConv::ID CallConv, bool isVarArg,
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bool &isTailCall,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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@ -124,7 +124,7 @@ namespace llvm {
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DebugLoc dl, SelectionDAG &DAG,
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SmallVectorImpl<SDValue> &InVals);
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virtual SDValue
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LowerCall(SDValue Chain, SDValue Callee, const Type *RetTy,
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LowerCall(SDValue Chain, SDValue Callee,
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CallingConv::ID CallConv, bool isVarArg, bool &isTailCall,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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const SmallVectorImpl<ISD::InputArg> &Ins,
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@ -1778,7 +1778,7 @@ EmitTailCallStoreRetAddr(SelectionDAG & DAG, MachineFunction &MF,
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}
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SDValue
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X86TargetLowering::LowerCall(SDValue Chain, SDValue Callee, const Type *RetTy,
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X86TargetLowering::LowerCall(SDValue Chain, SDValue Callee,
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CallingConv::ID CallConv, bool isVarArg,
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bool &isTailCall,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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@ -1791,8 +1791,8 @@ X86TargetLowering::LowerCall(SDValue Chain, SDValue Callee, const Type *RetTy,
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if (isTailCall)
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// Check if it's really possible to do a tail call.
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isTailCall = IsEligibleForTailCallOptimization(Callee, RetTy, CallConv,
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isVarArg, Outs, Ins, DAG);
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isTailCall = IsEligibleForTailCallOptimization(Callee, CallConv, isVarArg,
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Outs, Ins, DAG);
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assert(!(isVarArg && CallConv == CallingConv::Fast) &&
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"Var args not supported with calling convention fastcc");
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@ -2247,7 +2247,6 @@ unsigned X86TargetLowering::GetAlignedArgumentStackSize(unsigned StackSize,
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/// optimization should implement this function.
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bool
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X86TargetLowering::IsEligibleForTailCallOptimization(SDValue Callee,
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const Type *RetTy,
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CallingConv::ID CalleeCC,
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bool isVarArg,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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@ -2329,7 +2328,14 @@ X86TargetLowering::IsEligibleForTailCallOptimization(SDValue Callee,
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return true;
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// If the return types match, then it's safe.
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return CallerRetTy == RetTy;
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// Don't tail call optimize recursive call.
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GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee);
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if (!G) return false; // FIXME: common external symbols?
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if (const Function *CalleeF = dyn_cast<Function>(G->getGlobal())) {
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const Type *CalleeRetTy = CalleeF->getReturnType();
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return CallerRetTy == CalleeRetTy;
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}
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return false;
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}
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FastISel *
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/// IsEligibleForTailCallOptimization - Check whether the call is eligible
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/// for tail call optimization. Targets which want to do tail call
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/// optimization should implement this function.
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bool IsEligibleForTailCallOptimization(SDValue Callee, const Type *RetTy,
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bool IsEligibleForTailCallOptimization(SDValue Callee,
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CallingConv::ID CalleeCC,
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bool isVarArg,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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@ -707,7 +707,7 @@ namespace llvm {
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DebugLoc dl, SelectionDAG &DAG,
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SmallVectorImpl<SDValue> &InVals);
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virtual SDValue
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LowerCall(SDValue Chain, SDValue Callee, const Type *RetTy,
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LowerCall(SDValue Chain, SDValue Callee,
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CallingConv::ID CallConv, bool isVarArg, bool &isTailCall,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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const SmallVectorImpl<ISD::InputArg> &Ins,
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@ -609,7 +609,7 @@ SDValue XCoreTargetLowering::LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) {
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/// XCore call implementation
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SDValue
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XCoreTargetLowering::LowerCall(SDValue Chain, SDValue Callee, const Type *RetTy,
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XCoreTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
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CallingConv::ID CallConv, bool isVarArg,
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bool &isTailCall,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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@ -147,7 +147,7 @@ namespace llvm {
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SmallVectorImpl<SDValue> &InVals);
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virtual SDValue
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LowerCall(SDValue Chain, SDValue Callee, const Type *RetTy,
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LowerCall(SDValue Chain, SDValue Callee,
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CallingConv::ID CallConv, bool isVarArg,
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bool &isTailCall,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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