6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-11-16 11:05:54 +00:00
Code Issues Projects Releases Wiki Activity

McARM: Add a variety of asserts on the sanity of memory operands.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123737 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Daniel Dunbar 2011-01-18 05:34:05 +00:00
parent 81f453c4b9
commit 023835d51b
1 changed files with 10 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
View File

@ -415,11 +415,20 @@ public:
}
static ARMOperand *CreateMem(unsigned BaseRegNum, bool OffsetIsReg,
const MCExpr *Offset, unsigned OffsetRegNum,
const MCExpr *Offset, int OffsetRegNum,
bool OffsetRegShifted, enum ShiftType ShiftType,
const MCExpr *ShiftAmount, bool Preindexed,
bool Postindexed, bool Negative, bool Writeback,
SMLoc S, SMLoc E) {
assert((OffsetRegNum == -1 || OffsetIsReg) &&
"OffsetRegNum must imply OffsetIsReg!");
assert((!OffsetRegShifted || OffsetIsReg) &&
"OffsetRegShifted must imply OffsetIsReg!");
assert((!ShiftAmount || (OffsetIsReg && OffsetRegShifted)) &&
"Cannot have shift amount without shifted register offset!");
assert((!Offset || !OffsetIsReg) &&
"Cannot have expression offset and register offset!");
ARMOperand *Op = new ARMOperand(Memory);
Op->Mem.BaseRegNum = BaseRegNum;
Op->Mem.OffsetIsReg = OffsetIsReg;