From 0275b43b191de1af2904128a2b89c5f0d4a34799 Mon Sep 17 00:00:00 2001 From: Bill Wendling Date: Mon, 4 Aug 2014 04:25:53 +0000 Subject: [PATCH] Merging r213899: ------------------------------------------------------------------------ r213899 | joerg | 2014-07-24 15:20:10 -0700 (Thu, 24 Jul 2014) | 2 lines Don't use 128bit functions on PPC32. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@214685 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPCISelLowering.cpp | 7 +++++ test/CodeGen/PowerPC/ppc32-lshrti3.ll | 39 ++++++++++++++++++++++++++ 2 files changed, 46 insertions(+) create mode 100644 test/CodeGen/PowerPC/ppc32-lshrti3.ll diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 72e4626ed5b..d596bda49fd 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -626,6 +626,13 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM) // Altivec instructions set fields to all zeros or all ones. setBooleanVectorContents(ZeroOrNegativeOneBooleanContent); + if (!isPPC64) { + // These libcalls are not available in 32-bit. + setLibcallName(RTLIB::SHL_I128, nullptr); + setLibcallName(RTLIB::SRL_I128, nullptr); + setLibcallName(RTLIB::SRA_I128, nullptr); + } + if (isPPC64) { setStackPointerRegisterToSaveRestore(PPC::X1); setExceptionPointerRegister(PPC::X3); diff --git a/test/CodeGen/PowerPC/ppc32-lshrti3.ll b/test/CodeGen/PowerPC/ppc32-lshrti3.ll new file mode 100644 index 00000000000..6e76feaf1b3 --- /dev/null +++ b/test/CodeGen/PowerPC/ppc32-lshrti3.ll @@ -0,0 +1,39 @@ +; RUN: llc -O=2 < %s -mtriple=powerpc-netbsd | FileCheck %s + +; CHECK-NOT: bl __lshrti3 + +; ModuleID = 'lshrti3-ppc32.c' +target datalayout = "E-m:e-p:32:32-i64:64-n32" +target triple = "powerpc--netbsd" + +; Function Attrs: nounwind uwtable +define i32 @fn1() #0 { +entry: + %.promoted = load i72* inttoptr (i32 1 to i72*), align 4 + br label %while.cond + +while.cond: ; preds = %while.cond, %entry + %bf.set3 = phi i72 [ %bf.set, %while.cond ], [ %.promoted, %entry ] + %bf.lshr = lshr i72 %bf.set3, 40 + %bf.lshr.tr = trunc i72 %bf.lshr to i32 + %bf.cast = and i32 %bf.lshr.tr, 65535 + %dec = add nsw i32 %bf.lshr.tr, 65535 + %0 = zext i32 %dec to i72 + %bf.value = shl nuw i72 %0, 40 + %bf.shl = and i72 %bf.value, 72056494526300160 + %bf.clear2 = and i72 %bf.set3, -72056494526300161 + %bf.set = or i72 %bf.shl, %bf.clear2 + %tobool = icmp eq i32 %bf.cast, 0 + br i1 %tobool, label %while.end, label %while.cond + +while.end: ; preds = %while.cond + %bf.set.lcssa = phi i72 [ %bf.set, %while.cond ] + store i72 %bf.set.lcssa, i72* inttoptr (i32 1 to i72*), align 4 + ret i32 undef +} + +attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } + +!llvm.ident = !{!0} + +!0 = metadata !{metadata !"clang version 3.5.0 (213754)"}