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Efficiently handle a long multiplication by a constant. For this testcase:
long %test(long %X) { %Y = mul long %X, 123 ret long %Y } we used to generate: test: sub %ESP, 12 mov DWORD PTR [%ESP + 8], %ESI mov DWORD PTR [%ESP + 4], %EDI mov DWORD PTR [%ESP], %EBX mov %ECX, DWORD PTR [%ESP + 16] mov %ESI, DWORD PTR [%ESP + 20] mov %EDI, 123 mov %EBX, 0 mov %EAX, %ECX mul %EDI imul %ESI, %EDI add %ESI, %EDX imul %ECX, %EBX add %ESI, %ECX mov %EDX, %ESI mov %EBX, DWORD PTR [%ESP] mov %EDI, DWORD PTR [%ESP + 4] mov %ESI, DWORD PTR [%ESP + 8] add %ESP, 12 ret Now we emit: test: mov %EAX, DWORD PTR [%ESP + 4] mov %ECX, DWORD PTR [%ESP + 8] mov %EDX, 123 mul %EDX imul %ECX, %ECX, 123 add %ECX, %EDX mov %EDX, %ECX ret Which, incidently, is substantially nicer than what GCC manages: T: sub %esp, 8 mov %eax, 123 mov DWORD PTR [%esp], %ebx mov %ebx, DWORD PTR [%esp+16] mov DWORD PTR [%esp+4], %esi mov %esi, DWORD PTR [%esp+12] imul %ecx, %ebx, 123 mov %ebx, DWORD PTR [%esp] mul %esi mov %esi, DWORD PTR [%esp+4] add %esp, 8 lea %edx, [%ecx+%edx] ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12692 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1940,7 +1940,7 @@ void ISel::visitMul(BinaryOperator &I) {
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unsigned DestReg = getReg(I);
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// Simple scalar multiply?
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if (I.getType() != Type::LongTy && I.getType() != Type::ULongTy) {
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if (getClass(I.getType()) != cLong) {
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if (ConstantInt *CI = dyn_cast<ConstantInt>(I.getOperand(1))) {
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unsigned Val = (unsigned)CI->getRawValue(); // Cannot be 64-bit constant
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MachineBasicBlock::iterator MBBI = BB->end();
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@ -1951,31 +1951,64 @@ void ISel::visitMul(BinaryOperator &I) {
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doMultiply(BB, MBBI, DestReg, I.getType(), Op0Reg, Op1Reg);
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}
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} else {
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unsigned Op1Reg = getReg(I.getOperand(1));
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// Long value. We have to do things the hard way...
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// Multiply the two low parts... capturing carry into EDX
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BuildMI(BB, X86::MOV32rr, 1, X86::EAX).addReg(Op0Reg);
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BuildMI(BB, X86::MUL32r, 1).addReg(Op1Reg); // AL*BL
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if (ConstantInt *CI = dyn_cast<ConstantInt>(I.getOperand(1))) {
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unsigned CLow = CI->getRawValue();
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unsigned CHi = CI->getRawValue() >> 32;
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unsigned OverflowReg = makeAnotherReg(Type::UIntTy);
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BuildMI(BB, X86::MOV32rr, 1, DestReg).addReg(X86::EAX); // AL*BL
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BuildMI(BB, X86::MOV32rr, 1, OverflowReg).addReg(X86::EDX); // AL*BL >> 32
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MachineBasicBlock::iterator MBBI = BB->end();
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unsigned AHBLReg = makeAnotherReg(Type::UIntTy); // AH*BL
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BuildMI(*BB, MBBI, X86::IMUL32rr,2,AHBLReg).addReg(Op0Reg+1).addReg(Op1Reg);
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unsigned AHBLplusOverflowReg = makeAnotherReg(Type::UIntTy);
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BuildMI(*BB, MBBI, X86::ADD32rr, 2, // AH*BL+(AL*BL >> 32)
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AHBLplusOverflowReg).addReg(AHBLReg).addReg(OverflowReg);
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MBBI = BB->end();
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unsigned ALBHReg = makeAnotherReg(Type::UIntTy); // AL*BH
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BuildMI(*BB, MBBI, X86::IMUL32rr,2,ALBHReg).addReg(Op0Reg).addReg(Op1Reg+1);
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BuildMI(*BB, MBBI, X86::ADD32rr, 2, // AL*BH + AH*BL + (AL*BL >> 32)
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DestReg+1).addReg(AHBLplusOverflowReg).addReg(ALBHReg);
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// Multiply the two low parts... capturing carry into EDX
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unsigned Op1RegL = makeAnotherReg(Type::UIntTy);
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BuildMI(BB, X86::MOV32ri, 1, Op1RegL).addImm(CLow);
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BuildMI(BB, X86::MOV32rr, 1, X86::EAX).addReg(Op0Reg);
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BuildMI(BB, X86::MUL32r, 1).addReg(Op1RegL); // AL*BL
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unsigned OverflowReg = makeAnotherReg(Type::UIntTy);
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BuildMI(BB, X86::MOV32rr, 1, DestReg).addReg(X86::EAX); // AL*BL
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BuildMI(BB, X86::MOV32rr, 1, OverflowReg).addReg(X86::EDX); // AL*BL >> 32
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unsigned AHBLReg = makeAnotherReg(Type::UIntTy); // AH*BL
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BuildMI(BB, X86::IMUL32rri, 2, AHBLReg).addReg(Op0Reg+1).addImm(CLow);
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unsigned AHBLplusOverflowReg = makeAnotherReg(Type::UIntTy);
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BuildMI(BB, X86::ADD32rr, 2, // AH*BL+(AL*BL >> 32)
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AHBLplusOverflowReg).addReg(AHBLReg).addReg(OverflowReg);
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if (CHi != 0) {
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unsigned ALBHReg = makeAnotherReg(Type::UIntTy); // AL*BH
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BuildMI(BB, X86::IMUL32rri, 2, ALBHReg).addReg(Op0Reg).addImm(CHi);
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BuildMI(BB, X86::ADD32rr, 2, // AL*BH + AH*BL + (AL*BL >> 32)
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DestReg+1).addReg(AHBLplusOverflowReg).addReg(ALBHReg);
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} else {
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BuildMI(BB, X86::MOV32rr, 1, DestReg+1).addReg(AHBLplusOverflowReg);
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}
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} else {
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unsigned Op1Reg = getReg(I.getOperand(1));
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// Multiply the two low parts... capturing carry into EDX
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BuildMI(BB, X86::MOV32rr, 1, X86::EAX).addReg(Op0Reg);
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BuildMI(BB, X86::MUL32r, 1).addReg(Op1Reg); // AL*BL
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unsigned OverflowReg = makeAnotherReg(Type::UIntTy);
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BuildMI(BB, X86::MOV32rr, 1, DestReg).addReg(X86::EAX); // AL*BL
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BuildMI(BB, X86::MOV32rr, 1, OverflowReg).addReg(X86::EDX); // AL*BL >> 32
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MachineBasicBlock::iterator MBBI = BB->end();
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unsigned AHBLReg = makeAnotherReg(Type::UIntTy); // AH*BL
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BuildMI(*BB, MBBI, X86::IMUL32rr, 2,
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AHBLReg).addReg(Op0Reg+1).addReg(Op1Reg);
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unsigned AHBLplusOverflowReg = makeAnotherReg(Type::UIntTy);
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BuildMI(*BB, MBBI, X86::ADD32rr, 2, // AH*BL+(AL*BL >> 32)
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AHBLplusOverflowReg).addReg(AHBLReg).addReg(OverflowReg);
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MBBI = BB->end();
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unsigned ALBHReg = makeAnotherReg(Type::UIntTy); // AL*BH
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BuildMI(*BB, MBBI, X86::IMUL32rr, 2,
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ALBHReg).addReg(Op0Reg).addReg(Op1Reg+1);
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BuildMI(*BB, MBBI, X86::ADD32rr, 2, // AL*BH + AH*BL + (AL*BL >> 32)
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DestReg+1).addReg(AHBLplusOverflowReg).addReg(ALBHReg);
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}
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}
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}
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@ -1940,7 +1940,7 @@ void ISel::visitMul(BinaryOperator &I) {
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unsigned DestReg = getReg(I);
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// Simple scalar multiply?
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if (I.getType() != Type::LongTy && I.getType() != Type::ULongTy) {
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if (getClass(I.getType()) != cLong) {
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if (ConstantInt *CI = dyn_cast<ConstantInt>(I.getOperand(1))) {
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unsigned Val = (unsigned)CI->getRawValue(); // Cannot be 64-bit constant
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MachineBasicBlock::iterator MBBI = BB->end();
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@ -1951,31 +1951,64 @@ void ISel::visitMul(BinaryOperator &I) {
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doMultiply(BB, MBBI, DestReg, I.getType(), Op0Reg, Op1Reg);
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}
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} else {
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unsigned Op1Reg = getReg(I.getOperand(1));
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// Long value. We have to do things the hard way...
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// Multiply the two low parts... capturing carry into EDX
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BuildMI(BB, X86::MOV32rr, 1, X86::EAX).addReg(Op0Reg);
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BuildMI(BB, X86::MUL32r, 1).addReg(Op1Reg); // AL*BL
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if (ConstantInt *CI = dyn_cast<ConstantInt>(I.getOperand(1))) {
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unsigned CLow = CI->getRawValue();
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unsigned CHi = CI->getRawValue() >> 32;
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unsigned OverflowReg = makeAnotherReg(Type::UIntTy);
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BuildMI(BB, X86::MOV32rr, 1, DestReg).addReg(X86::EAX); // AL*BL
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BuildMI(BB, X86::MOV32rr, 1, OverflowReg).addReg(X86::EDX); // AL*BL >> 32
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MachineBasicBlock::iterator MBBI = BB->end();
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unsigned AHBLReg = makeAnotherReg(Type::UIntTy); // AH*BL
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BuildMI(*BB, MBBI, X86::IMUL32rr,2,AHBLReg).addReg(Op0Reg+1).addReg(Op1Reg);
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unsigned AHBLplusOverflowReg = makeAnotherReg(Type::UIntTy);
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BuildMI(*BB, MBBI, X86::ADD32rr, 2, // AH*BL+(AL*BL >> 32)
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AHBLplusOverflowReg).addReg(AHBLReg).addReg(OverflowReg);
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MBBI = BB->end();
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unsigned ALBHReg = makeAnotherReg(Type::UIntTy); // AL*BH
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BuildMI(*BB, MBBI, X86::IMUL32rr,2,ALBHReg).addReg(Op0Reg).addReg(Op1Reg+1);
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BuildMI(*BB, MBBI, X86::ADD32rr, 2, // AL*BH + AH*BL + (AL*BL >> 32)
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DestReg+1).addReg(AHBLplusOverflowReg).addReg(ALBHReg);
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// Multiply the two low parts... capturing carry into EDX
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unsigned Op1RegL = makeAnotherReg(Type::UIntTy);
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BuildMI(BB, X86::MOV32ri, 1, Op1RegL).addImm(CLow);
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BuildMI(BB, X86::MOV32rr, 1, X86::EAX).addReg(Op0Reg);
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BuildMI(BB, X86::MUL32r, 1).addReg(Op1RegL); // AL*BL
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unsigned OverflowReg = makeAnotherReg(Type::UIntTy);
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BuildMI(BB, X86::MOV32rr, 1, DestReg).addReg(X86::EAX); // AL*BL
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BuildMI(BB, X86::MOV32rr, 1, OverflowReg).addReg(X86::EDX); // AL*BL >> 32
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unsigned AHBLReg = makeAnotherReg(Type::UIntTy); // AH*BL
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BuildMI(BB, X86::IMUL32rri, 2, AHBLReg).addReg(Op0Reg+1).addImm(CLow);
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unsigned AHBLplusOverflowReg = makeAnotherReg(Type::UIntTy);
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BuildMI(BB, X86::ADD32rr, 2, // AH*BL+(AL*BL >> 32)
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AHBLplusOverflowReg).addReg(AHBLReg).addReg(OverflowReg);
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if (CHi != 0) {
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unsigned ALBHReg = makeAnotherReg(Type::UIntTy); // AL*BH
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BuildMI(BB, X86::IMUL32rri, 2, ALBHReg).addReg(Op0Reg).addImm(CHi);
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BuildMI(BB, X86::ADD32rr, 2, // AL*BH + AH*BL + (AL*BL >> 32)
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DestReg+1).addReg(AHBLplusOverflowReg).addReg(ALBHReg);
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} else {
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BuildMI(BB, X86::MOV32rr, 1, DestReg+1).addReg(AHBLplusOverflowReg);
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}
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} else {
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unsigned Op1Reg = getReg(I.getOperand(1));
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// Multiply the two low parts... capturing carry into EDX
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BuildMI(BB, X86::MOV32rr, 1, X86::EAX).addReg(Op0Reg);
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BuildMI(BB, X86::MUL32r, 1).addReg(Op1Reg); // AL*BL
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unsigned OverflowReg = makeAnotherReg(Type::UIntTy);
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BuildMI(BB, X86::MOV32rr, 1, DestReg).addReg(X86::EAX); // AL*BL
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BuildMI(BB, X86::MOV32rr, 1, OverflowReg).addReg(X86::EDX); // AL*BL >> 32
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MachineBasicBlock::iterator MBBI = BB->end();
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unsigned AHBLReg = makeAnotherReg(Type::UIntTy); // AH*BL
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BuildMI(*BB, MBBI, X86::IMUL32rr, 2,
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AHBLReg).addReg(Op0Reg+1).addReg(Op1Reg);
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unsigned AHBLplusOverflowReg = makeAnotherReg(Type::UIntTy);
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BuildMI(*BB, MBBI, X86::ADD32rr, 2, // AH*BL+(AL*BL >> 32)
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AHBLplusOverflowReg).addReg(AHBLReg).addReg(OverflowReg);
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MBBI = BB->end();
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unsigned ALBHReg = makeAnotherReg(Type::UIntTy); // AL*BH
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BuildMI(*BB, MBBI, X86::IMUL32rr, 2,
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ALBHReg).addReg(Op0Reg).addReg(Op1Reg+1);
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BuildMI(*BB, MBBI, X86::ADD32rr, 2, // AL*BH + AH*BL + (AL*BL >> 32)
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DestReg+1).addReg(AHBLplusOverflowReg).addReg(ALBHReg);
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}
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}
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}
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