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This is the real fix for the previous register allocator problem.
Physical registers should not float around. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7587 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -646,6 +646,8 @@ bool ISel::EmitComparisonGetSignedness(unsigned OpNum, Value *Op0, Value *Op1) {
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BuildMI(BB, SetCCOpcodeTab[0][OpNum], 0, X86::AL);
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BuildMI(BB, X86::CMPrr32, 2).addReg(Op0r+1).addReg(Op1r+1);
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BuildMI(BB, SetCCOpcodeTab[isSigned][OpNum], 0, X86::BL);
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BuildMI(BB, X86::IMPLICIT_DEF, 0, X86::BH);
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BuildMI(BB, X86::IMPLICIT_DEF, 0, X86::AH);
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BuildMI(BB, X86::CMOVErr16, 2, X86::BX).addReg(X86::BX).addReg(X86::AX);
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// NOTE: visitSetCondInst knows that the value is dumped into the BL
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// register at this point for long values...
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