This is the real fix for the previous register allocator problem.

Physical registers should not float around.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7587 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2003-08-05 00:48:47 +00:00
parent b10cea86a9
commit 02beda1221
4 changed files with 6 additions and 1 deletions
+2
View File
@@ -646,6 +646,8 @@ bool ISel::EmitComparisonGetSignedness(unsigned OpNum, Value *Op0, Value *Op1) {
BuildMI(BB, SetCCOpcodeTab[0][OpNum], 0, X86::AL);
BuildMI(BB, X86::CMPrr32, 2).addReg(Op0r+1).addReg(Op1r+1);
BuildMI(BB, SetCCOpcodeTab[isSigned][OpNum], 0, X86::BL);
BuildMI(BB, X86::IMPLICIT_DEF, 0, X86::BH);
BuildMI(BB, X86::IMPLICIT_DEF, 0, X86::AH);
BuildMI(BB, X86::CMOVErr16, 2, X86::BX).addReg(X86::BX).addReg(X86::AX);
// NOTE: visitSetCondInst knows that the value is dumped into the BL
// register at this point for long values...