6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-06-12 13:38:21 +00:00
Code Issues Projects Releases Wiki Activity

Revert 127368 and 127371 for now.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127376 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2011-03-09 23:53:17 +00:00
parent 0f24d49aca
commit 02d7c92982
4 changed files with 14 additions and 29 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
View File

@ -1140,19 +1140,13 @@ SUnit *ScheduleDAGRRList::PickNodeToScheduleBottomUp() {
TRI->getMinimalPhysRegClass(Reg, VT);
const TargetRegisterClass *DestRC = TRI->getCrossCopyRegClass(RC);
// If cross copy register class is the same as RC, then it must be possible
// copy the value directly. Do not try duplicate the def.
// If cross copy register class is not the same as RC, then it's possible to
// copy the value but it require cross register class copies and it is
// expensive.
// If cross copy register class is null, then it's not possible to copy
// the value at all.
// If cross copy register class is null, then it must be possible copy
// the value directly. Do not try duplicate the def.
SUnit *NewDef = 0;
if (DestRC != RC) {
if (DestRC)
NewDef = CopyAndMoveSuccessors(LRDef);
if (!DestRC && !NewDef)
report_fatal_error("Can't handle live physical register dependency!");
}
else
DestRC = RC;
if (!NewDef) {
// Issue copies, these can be expensive cross register class copies.
SmallVector<SUnit*, 2> Copies;