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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-06-21 02:24:22 +00:00
Now that PassInfo and Pass::ID have been separated, move the rest of the passes over to the new registration API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111815 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -24,8 +24,8 @@ TEMPLATE_INSTANTIATION(class DominatorTreeBase<MachineBasicBlock>);
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char MachineDominatorTree::ID = 0;
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static RegisterPass<MachineDominatorTree>
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E("machinedomtree", "MachineDominator Tree Construction", true);
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INITIALIZE_PASS(MachineDominatorTree, "machinedomtree",
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"MachineDominator Tree Construction", true, true);
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char &llvm::MachineDominatorsID = MachineDominatorTree::ID;
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@ -30,8 +30,8 @@ TEMPLATE_INSTANTIATION(MLIB);
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}
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char MachineLoopInfo::ID = 0;
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static RegisterPass<MachineLoopInfo>
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X("machine-loops", "Machine Natural Loop Construction", true);
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INITIALIZE_PASS(MachineLoopInfo, "machine-loops",
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"Machine Natural Loop Construction", true, true);
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char &llvm::MachineLoopInfoID = MachineLoopInfo::ID;
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@ -211,9 +211,8 @@ namespace {
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}
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char MachineVerifierPass::ID = 0;
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static RegisterPass<MachineVerifierPass>
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MachineVer("machineverifier", "Verify generated machine code");
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static const PassInfo *const MachineVerifyID = &MachineVer;
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INITIALIZE_PASS(MachineVerifierPass, "machineverifier",
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"Verify generated machine code", false, false);
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FunctionPass *llvm::createMachineVerifierPass() {
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return new MachineVerifierPass();
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@ -38,8 +38,8 @@ STATISTIC(NumAtomic, "Number of atomic phis lowered");
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STATISTIC(NumReused, "Number of reused lowered phis");
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char PHIElimination::ID = 0;
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static RegisterPass<PHIElimination>
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X("phi-node-elimination", "Eliminate PHI nodes for register allocation");
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INITIALIZE_PASS(PHIElimination, "phi-node-elimination",
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"Eliminate PHI nodes for register allocation", false, false);
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char &llvm::PHIEliminationID = PHIElimination::ID;
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@ -203,8 +203,9 @@ namespace {
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char PreAllocSplitting::ID = 0;
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static RegisterPass<PreAllocSplitting>
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X("pre-alloc-splitting", "Pre-Register Allocation Live Interval Splitting");
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INITIALIZE_PASS(PreAllocSplitting, "pre-alloc-splitting",
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"Pre-Register Allocation Live Interval Splitting",
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false, false);
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char &llvm::PreAllocSplittingID = PreAllocSplitting::ID;
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@ -59,11 +59,9 @@ DisableCrossClassJoin("disable-cross-class-join",
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cl::desc("Avoid coalescing cross register class copies"),
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cl::init(false), cl::Hidden);
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static RegisterPass<SimpleRegisterCoalescing>
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X("simple-register-coalescing", "Simple Register Coalescing");
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// Declare that we implement the RegisterCoalescer interface
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static RegisterAnalysisGroup<RegisterCoalescer, true/*The Default*/> V(X);
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INITIALIZE_AG_PASS(SimpleRegisterCoalescing, RegisterCoalescer,
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"simple-register-coalescing", "Simple Register Coalescing",
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false, false, true);
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char &llvm::SimpleRegisterCoalescingID = SimpleRegisterCoalescing::ID;
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@ -150,9 +150,8 @@ namespace {
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}
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char StrongPHIElimination::ID = 0;
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static RegisterPass<StrongPHIElimination>
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X("strong-phi-node-elimination",
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"Eliminate PHI nodes for register allocation, intelligently");
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INITIALIZE_PASS(StrongPHIElimination, "strong-phi-node-elimination",
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"Eliminate PHI nodes for register allocation, intelligently", false, false);
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char &llvm::StrongPHIEliminationID = StrongPHIElimination::ID;
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@ -159,8 +159,8 @@ namespace {
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}
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char TwoAddressInstructionPass::ID = 0;
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static RegisterPass<TwoAddressInstructionPass>
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X("twoaddressinstruction", "Two-Address instruction pass");
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INITIALIZE_PASS(TwoAddressInstructionPass, "twoaddressinstruction",
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"Two-Address instruction pass", false, false);
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char &llvm::TwoAddressInstructionPassID = TwoAddressInstructionPass::ID;
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@ -105,9 +105,8 @@ namespace {
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}
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char UnreachableMachineBlockElim::ID = 0;
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static RegisterPass<UnreachableMachineBlockElim>
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Y("unreachable-mbb-elimination",
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"Remove unreachable machine basic blocks");
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INITIALIZE_PASS(UnreachableMachineBlockElim, "unreachable-mbb-elimination",
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"Remove unreachable machine basic blocks", false, false);
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char &llvm::UnreachableMachineBlockElimID = UnreachableMachineBlockElim::ID;
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