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Remove JMP64pcrel32 (jmpq ). There are no tests for it. I'm pretty sure it won't be emitted correctly since it was set to NoImm. And I can't prove that gas accepts 'jmpq' with an immediate either. Remove the special case for it from the disassembler table generator.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198475 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper
2014-01-04 05:09:27 +00:00
parent 15b3169062
commit 030ceadd69
2 changed files with 1 additions and 7 deletions
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5
lib/Target/X86/X86InstrControl.td
View File

@@ -52,11 +52,6 @@ let isBarrier = 1, isBranch = 1, isTerminator = 1, SchedRW = [WriteJump] in {
let hasSideEffects = 0 in let hasSideEffects = 0 in
def JMP_1 : Ii8PCRel<0xEB, RawFrm, (outs), (ins brtarget8:$dst), def JMP_1 : Ii8PCRel<0xEB, RawFrm, (outs), (ins brtarget8:$dst),
"jmp\t$dst", [], IIC_JMP_REL>; "jmp\t$dst", [], IIC_JMP_REL>;
// FIXME : Intel syntax for JMP64pcrel32 such that it is not ambiguious
// with JMP_1.
let hasSideEffects = 0 in
def JMP64pcrel32 : I<0xE9, RawFrm, (outs), (ins brtarget:$dst),
"jmpq\t$dst", [], IIC_JMP_REL>;
} }
// Conditional Branches. // Conditional Branches.

3
utils/TableGen/X86RecognizableInstr.cpp
View File

@@ -275,8 +275,7 @@ RecognizableInstr::RecognizableInstr(DisassemblerTables &tables,
} }
} }
// FIXME: These instructions aren't marked as 64-bit in any way // FIXME: These instructions aren't marked as 64-bit in any way
Is64Bit |= Rec->getName() == "JMP64pcrel32" || Is64Bit |= Rec->getName().find("MOV64") != Name.npos ||
Rec->getName().find("MOV64") != Name.npos ||
Rec->getName().find("PUSH64") != Name.npos || Rec->getName().find("PUSH64") != Name.npos ||
Rec->getName().find("POP64") != Name.npos; Rec->getName().find("POP64") != Name.npos;