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Remove JMP64pcrel32 (jmpq ). There are no tests for it. I'm pretty sure it won't be emitted correctly since it was set to NoImm. And I can't prove that gas accepts 'jmpq' with an immediate either. Remove the special case for it from the disassembler table generator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198475 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -52,11 +52,6 @@ let isBarrier = 1, isBranch = 1, isTerminator = 1, SchedRW = [WriteJump] in {
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let hasSideEffects = 0 in
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def JMP_1 : Ii8PCRel<0xEB, RawFrm, (outs), (ins brtarget8:$dst),
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"jmp\t$dst", [], IIC_JMP_REL>;
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// FIXME : Intel syntax for JMP64pcrel32 such that it is not ambiguious
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// with JMP_1.
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let hasSideEffects = 0 in
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def JMP64pcrel32 : I<0xE9, RawFrm, (outs), (ins brtarget:$dst),
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"jmpq\t$dst", [], IIC_JMP_REL>;
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}
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// Conditional Branches.
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@ -275,8 +275,7 @@ RecognizableInstr::RecognizableInstr(DisassemblerTables &tables,
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}
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}
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// FIXME: These instructions aren't marked as 64-bit in any way
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Is64Bit |= Rec->getName() == "JMP64pcrel32" ||
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Rec->getName().find("MOV64") != Name.npos ||
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Is64Bit |= Rec->getName().find("MOV64") != Name.npos ||
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Rec->getName().find("PUSH64") != Name.npos ||
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Rec->getName().find("POP64") != Name.npos;
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