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Now that register classes have names, include the name in debug output.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68786 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2009-04-10 15:59:38 +00:00
parent 5c5f5a2ec2
commit 0355862f71
1 changed files with 4 additions and 2 deletions
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6
lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp
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@ -268,9 +268,11 @@ void ScheduleDAGSDNodes::AddOperand(MachineInstr *MI, SDValue Op,
cerr << "Op->Val = "; Op.getNode()->dump(DAG); cerr << "\n";
cerr << "MI = "; MI->print(cerr);
cerr << "VReg = " << VReg << "\n";
cerr << "VReg RegClass size = " << VRC->getSize()
cerr << "VReg RegClass " << VRC->getName()
<< " size = " << VRC->getSize()
<< ", align = " << VRC->getAlignment() << "\n";
cerr << "Expected RegClass size = " << RC->getSize()
cerr << "Expected RegClass " << RC->getName()
<< " size = " << RC->getSize()
<< ", align = " << RC->getAlignment() << "\n";
cerr << "Fatal error, aborting.\n";
abort();