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Update MachineVerifier to check the new physreg live-in rules.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150496 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Lang Hames 2012-02-14 19:17:48 +00:00
parent 342c64c904
commit 03698deb25
1 changed files with 22 additions and 0 deletions
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22
lib/CodeGen/MachineVerifier.cpp
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@ -75,6 +75,7 @@ namespace {
const MachineInstr *FirstTerminator;
BitVector regsReserved;
BitVector regsAllocatable;
RegSet regsLive;
RegVector regsDefined, regsDead, regsKilled;
RegSet regsLiveInButUnused;
@ -175,6 +176,10 @@ namespace {
return Reg < regsReserved.size() && regsReserved.test(Reg);
}
bool isAllocatable(unsigned Reg) {
return Reg < regsAllocatable.size() && regsAllocatable.test(Reg);
}
// Analysis information if available
LiveVariables *LiveVars;
LiveIntervals *LiveInts;
@ -380,6 +385,9 @@ void MachineVerifier::visitMachineFunctionBefore() {
regsReserved.set(*Sub);
}
}
regsAllocatable = TRI->getAllocatableSet(*MF);
markReachable(&MF->front());
}
@ -397,6 +405,20 @@ void
MachineVerifier::visitMachineBasicBlockBefore(const MachineBasicBlock *MBB) {
FirstTerminator = 0;
if (MRI->isSSA()) {
// If this block has allocatable physical registers live-in, check that
// it is an entry block or landing pad.
for (MachineBasicBlock::livein_iterator LI = MBB->livein_begin(),
LE = MBB->livein_end();
LI != LE; ++LI) {
unsigned reg = *LI;
if (isAllocatable(reg) && !MBB->isLandingPad() &&
MBB != MBB->getParent()->begin()) {
report("MBB has allocable live-in, but isn't entry or landing-pad.", MBB);
}
}
}
// Count the number of landing pad successors.
SmallPtrSet<MachineBasicBlock*, 4> LandingPadSuccs;
for (MachineBasicBlock::const_succ_iterator I = MBB->succ_begin(),