6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-16 00:33:10 +00:00
Code Issues Projects Releases Wiki Activity

Document that MCExpr::Mod is actually remainder.

Browse Source 
Document that MCExpr::Div, Mod, and the comparison operators are all
signed operators.

Document that the comparison operators' results are target-dependent.

Document that the behavior of shr is target-dependent.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95619 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2010-02-08 23:58:47 +00:00
parent 8609fda0f7
commit 036c130e90
2 changed files with 14 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
include/llvm/MC/MCExpr.h
View File

@ -202,20 +202,24 @@ public:
enum Opcode { enum Opcode {
Add, ///< Addition. Add, ///< Addition.
And, ///< Bitwise and. And, ///< Bitwise and.
Div, ///< Division. Div, ///< Signed division.
EQ, ///< Equality comparison. EQ, ///< Equality comparison.
GT, ///< Greater than comparison. GT, ///< Signed greater than comparison (result is either 0 or some
GTE, ///< Greater than or equal comparison. ///< target-specific non-zero value)
GTE, ///< Signed greater than or equal comparison (result is either 0 or
///< some target-specific non-zero value).
LAnd, ///< Logical and. LAnd, ///< Logical and.
LOr, ///< Logical or. LOr, ///< Logical or.
LT, ///< Less than comparison. LT, ///< Signed less than comparison (result is either 0 or
LTE, ///< Less than or equal comparison. ///< some target-specific non-zero value).
Mod, ///< Modulus. LTE, ///< Signed less than or equal comparison (result is either 0 or
///< some target-specific non-zero value).
Mod, ///< Signed remainder.
Mul, ///< Multiplication. Mul, ///< Multiplication.
NE, ///< Inequality comparison. NE, ///< Inequality comparison.
Or, ///< Bitwise or. Or, ///< Bitwise or.
Shl, ///< Bitwise shift left. Shl, ///< Shift left.
Shr, ///< Bitwise shift right. Shr, ///< Shift right (arithmetic or logical, depending on target)
Sub, ///< Subtraction. Sub, ///< Subtraction.
Xor ///< Bitwise exclusive or. Xor ///< Bitwise exclusive or.
}; };

4
lib/MC/MCExpr.cpp
View File

@ -252,8 +252,8 @@ bool MCExpr::EvaluateAsRelocatable(MCValue &Res) const {
} }
// FIXME: We need target hooks for the evaluation. It may be limited in // FIXME: We need target hooks for the evaluation. It may be limited in
// width, and gas defines the result of comparisons differently from Apple // width, and gas defines the result of comparisons and right shifts
// as (the result is sign extended). // differently from Apple as.
int64_t LHS = LHSValue.getConstant(), RHS = RHSValue.getConstant(); int64_t LHS = LHSValue.getConstant(), RHS = RHSValue.getConstant();
int64_t Result = 0; int64_t Result = 0;
switch (ABE->getOpcode()) { switch (ABE->getOpcode()) {