mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-04-22 15:39:28 +00:00
PR10421: Fix a straightforward bug in the widening logic for CONCAT_VECTORS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135595 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
9d999f58e3
commit
0381c21d2d
@ -1661,6 +1661,7 @@ SDValue DAGTypeLegalizer::WidenVecRes_CONCAT_VECTORS(SDNode *N) {
|
||||
EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
|
||||
DebugLoc dl = N->getDebugLoc();
|
||||
unsigned WidenNumElts = WidenVT.getVectorNumElements();
|
||||
unsigned NumInElts = InVT.getVectorNumElements();
|
||||
unsigned NumOperands = N->getNumOperands();
|
||||
|
||||
bool InputWidened = false; // Indicates we need to widen the input.
|
||||
@ -1686,17 +1687,17 @@ SDValue DAGTypeLegalizer::WidenVecRes_CONCAT_VECTORS(SDNode *N) {
|
||||
if (N->getOperand(i).getOpcode() != ISD::UNDEF)
|
||||
break;
|
||||
|
||||
if (i > NumOperands)
|
||||
if (i == NumOperands)
|
||||
// Everything but the first operand is an UNDEF so just return the
|
||||
// widened first operand.
|
||||
return GetWidenedVector(N->getOperand(0));
|
||||
|
||||
if (NumOperands == 2) {
|
||||
// Replace concat of two operands with a shuffle.
|
||||
SmallVector<int, 16> MaskOps(WidenNumElts);
|
||||
for (unsigned i=0; i < WidenNumElts/2; ++i) {
|
||||
SmallVector<int, 16> MaskOps(WidenNumElts, -1);
|
||||
for (unsigned i = 0; i < NumInElts; ++i) {
|
||||
MaskOps[i] = i;
|
||||
MaskOps[i+WidenNumElts/2] = i+WidenNumElts;
|
||||
MaskOps[i + NumInElts] = i + WidenNumElts;
|
||||
}
|
||||
return DAG.getVectorShuffle(WidenVT, dl,
|
||||
GetWidenedVector(N->getOperand(0)),
|
||||
@ -1708,7 +1709,6 @@ SDValue DAGTypeLegalizer::WidenVecRes_CONCAT_VECTORS(SDNode *N) {
|
||||
|
||||
// Fall back to use extracts and build vector.
|
||||
EVT EltVT = WidenVT.getVectorElementType();
|
||||
unsigned NumInElts = InVT.getVectorNumElements();
|
||||
SmallVector<SDValue, 16> Ops(WidenNumElts);
|
||||
unsigned Idx = 0;
|
||||
for (unsigned i=0; i < NumOperands; ++i) {
|
||||
|
@ -30,6 +30,7 @@ entry:
|
||||
; opA with opB, the DAG will produce new operations with opA.
|
||||
define void @shuf3(<4 x float> %tmp10, <4 x float> %vecinit15, <4 x float>* %dst) nounwind {
|
||||
entry:
|
||||
; CHECK: shuf3:
|
||||
; CHECK: pshufd
|
||||
%shuffle.i.i.i12 = shufflevector <4 x float> %tmp10, <4 x float> %vecinit15, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
|
||||
%tmp25.i.i = shufflevector <4 x float> %shuffle.i.i.i12, <4 x float> undef, <3 x i32> <i32 0, i32 1, i32 2>
|
||||
@ -46,3 +47,10 @@ entry:
|
||||
ret void
|
||||
}
|
||||
|
||||
; PR10421: make sure we correctly handle extreme widening with CONCAT_VECTORS
|
||||
define <8 x i8> @shuf4(<4 x i8> %a, <4 x i8> %b) nounwind readnone {
|
||||
; CHECK: shuf4:
|
||||
; CHECK: punpckldq
|
||||
%vshuf = shufflevector <4 x i8> %a, <4 x i8> %b, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
||||
ret <8 x i8> %vshuf
|
||||
}
|
||||
|
Loading…
x
Reference in New Issue
Block a user