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[NVPTX] mul.wide generation works for any smaller integer source types, not just the next smaller power of two
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213784 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -4053,13 +4053,13 @@ static bool IsMulWideOperandDemotable(SDValue Op,
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if (Op.getOpcode() == ISD::SIGN_EXTEND ||
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Op.getOpcode() == ISD::SIGN_EXTEND_INREG) {
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EVT OrigVT = Op.getOperand(0).getValueType();
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if (OrigVT.getSizeInBits() == OptSize) {
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if (OrigVT.getSizeInBits() <= OptSize) {
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S = Signed;
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return true;
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}
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} else if (Op.getOpcode() == ISD::ZERO_EXTEND) {
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EVT OrigVT = Op.getOperand(0).getValueType();
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if (OrigVT.getSizeInBits() == OptSize) {
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if (OrigVT.getSizeInBits() <= OptSize) {
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S = Unsigned;
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return true;
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}
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@ -23,6 +23,28 @@ define i32 @mulwideu16(i16 %a, i16 %b) {
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ret i32 %val2
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}
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; OPT-LABEL: @mulwide8
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; NOOPT-LABEL: @mulwide8
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define i32 @mulwide8(i8 %a, i8 %b) {
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; OPT: mul.wide.s16
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; NOOPT: mul.lo.s32
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%val0 = sext i8 %a to i32
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%val1 = sext i8 %b to i32
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%val2 = mul i32 %val0, %val1
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ret i32 %val2
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}
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; OPT-LABEL: @mulwideu8
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; NOOPT-LABEL: @mulwideu8
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define i32 @mulwideu8(i8 %a, i8 %b) {
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; OPT: mul.wide.u16
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; NOOPT: mul.lo.s32
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%val0 = zext i8 %a to i32
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%val1 = zext i8 %b to i32
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%val2 = mul i32 %val0, %val1
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ret i32 %val2
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}
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; OPT-LABEL: @mulwide32
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; NOOPT-LABEL: @mulwide32
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define i64 @mulwide32(i32 %a, i32 %b) {
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