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https://github.com/c64scene-ar/llvm-6502.git
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Don't emit FP_REG_KILL into a block that just returns. Nothing
can be live out of the block anyway, so it isn't needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48192 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -550,7 +550,8 @@ void X86DAGToDAGISel::InstructionSelectBasicBlock(SelectionDAG &DAG) {
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DAG.RemoveDeadNodes();
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DAG.RemoveDeadNodes();
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// Emit machine code to BB.
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// Emit machine code to BB. This can change 'BB' to the last block being
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// inserted into.
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ScheduleAndEmitDAG(DAG);
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ScheduleAndEmitDAG(DAG);
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// If we are emitting FP stack code, scan the basic block to determine if this
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// If we are emitting FP stack code, scan the basic block to determine if this
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@@ -566,15 +567,27 @@ void X86DAGToDAGISel::InstructionSelectBasicBlock(SelectionDAG &DAG) {
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// Scan all of the machine instructions in these MBBs, checking for FP
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// Scan all of the machine instructions in these MBBs, checking for FP
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// stores. (RFP32 and RFP64 will not exist in SSE mode, but RFP80 might.)
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// stores. (RFP32 and RFP64 will not exist in SSE mode, but RFP80 might.)
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MachineFunction::iterator MBBI = FirstMBB;
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MachineFunction::iterator MBBI = FirstMBB;
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do {
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MachineFunction::iterator EndMBB = BB; ++EndMBB;
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for (; MBBI != EndMBB; ++MBBI) {
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MachineBasicBlock *MBB = MBBI;
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// If this block returns, ignore it. We don't want to insert an FP_REG_KILL
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// before the return.
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if (!MBB->empty()) {
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MachineBasicBlock::iterator EndI = MBB->end();
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--EndI;
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if (EndI->getDesc().isReturn())
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continue;
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}
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bool ContainsFPCode = false;
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bool ContainsFPCode = false;
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for (MachineBasicBlock::iterator I = MBBI->begin(), E = MBBI->end();
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for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
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!ContainsFPCode && I != E; ++I) {
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!ContainsFPCode && I != E; ++I) {
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if (I->getNumOperands() != 0 && I->getOperand(0).isRegister()) {
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if (I->getNumOperands() != 0 && I->getOperand(0).isRegister()) {
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const TargetRegisterClass *clas;
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const TargetRegisterClass *clas;
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for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op) {
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for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op) {
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if (I->getOperand(op).isRegister() && I->getOperand(op).isDef() &&
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if (I->getOperand(op).isRegister() && I->getOperand(op).isDef() &&
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TargetRegisterInfo::isVirtualRegister(I->getOperand(op).getReg()) &&
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TargetRegisterInfo::isVirtualRegister(I->getOperand(op).getReg()) &&
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((clas = RegInfo->getRegClass(I->getOperand(0).getReg())) ==
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((clas = RegInfo->getRegClass(I->getOperand(0).getReg())) ==
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X86::RFP32RegisterClass ||
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X86::RFP32RegisterClass ||
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clas == X86::RFP64RegisterClass ||
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clas == X86::RFP64RegisterClass ||
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@@ -608,11 +621,11 @@ void X86DAGToDAGISel::InstructionSelectBasicBlock(SelectionDAG &DAG) {
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}
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}
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// Finally, if we found any FP code, emit the FP_REG_KILL instruction.
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// Finally, if we found any FP code, emit the FP_REG_KILL instruction.
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if (ContainsFPCode) {
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if (ContainsFPCode) {
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BuildMI(*MBBI, MBBI->getFirstTerminator(),
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BuildMI(*MBB, MBBI->getFirstTerminator(),
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TM.getInstrInfo()->get(X86::FP_REG_KILL));
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TM.getInstrInfo()->get(X86::FP_REG_KILL));
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++NumFPKill;
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++NumFPKill;
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}
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}
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} while (&*(MBBI++) != BB);
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}
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}
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}
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/// EmitSpecialCodeForMain - Emit any code that needs to be executed only in
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/// EmitSpecialCodeForMain - Emit any code that needs to be executed only in
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@@ -1,5 +1,7 @@
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; Verify that the addl comes before any popl.
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; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -mcpu=i386 | \
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; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -mcpu=i386 | \
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; RUN: %prcontext ret 1 | grep FP_REG_KILL
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; RUN: %prcontext ret 1 | grep popl
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; PR1573
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; PR1573
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%struct.c34006f__TsB = type { i8, i32, i32, %struct.c34006f__TsB___b___XVN }
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%struct.c34006f__TsB = type { i8, i32, i32, %struct.c34006f__TsB___b___XVN }
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