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Add new TargetInstrDesc::hasImplicitUseOfPhysReg and

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hasImplicitDefOfPhysReg methods.  Use them to remove a 
look in X86 fast isel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68886 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2009-04-12 07:26:51 +00:00
parent f5b6bc7f0e
commit 0461c0a8f5
2 changed files with 21 additions and 15 deletions
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18
include/llvm/Target/TargetInstrDesc.h
View File

@ -200,6 +200,24 @@ public:
return ImplicitDefs;
}
/// hasImplicitUseOfPhysReg - Return true if this instruction implicitly
/// uses the specified physical register.
bool hasImplicitUseOfPhysReg(unsigned Reg) const {
if (const unsigned *ImpUses = ImplicitUses)
for (; *ImpUses; ++ImpUses)
if (*ImpUses == Reg) return true;
return false;
}
/// hasImplicitDefOfPhysReg - Return true if this instruction implicitly
/// defines the specified physical register.
bool hasImplicitDefOfPhysReg(unsigned Reg) const {
if (const unsigned *ImpDefs = ImplicitDefs)
for (; *ImpDefs; ++ImpDefs)
if (*ImpDefs == Reg) return true;
return false;
}
/// getRegClassBarriers - Return a list of register classes that are
/// completely clobbered by this machine instruction. For example, on X86
/// the call instructions will completely clobber all the registers in the

16
lib/Target/X86/X86FastISel.cpp
View File

@ -808,22 +808,10 @@ bool X86FastISel::X86SelectBranch(Instruction *I) {
}
const TargetInstrDesc &TID = MI.getDesc();
const unsigned *ImpDefs = TID.getImplicitDefs();
if (TID.hasUnmodeledSideEffects()) break;
bool ModifiesEFlags = false;
if (ImpDefs) {
for (unsigned u = 0; ImpDefs[u]; ++u)
if (ImpDefs[u] == X86::EFLAGS) {
ModifiesEFlags = true;
if (TID.hasUnmodeledSideEffects() ||
TID.hasImplicitDefOfPhysReg(X86::EFLAGS))
break;
}
}
if (ModifiesEFlags) break;
}
if (SetMI) {
unsigned OpCode = SetMI->getOpcode();