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add aliases for movs between seg registers and mem. There are multiple
different forms of this instruction (movw/movl/movq) which we reported as being ambiguous. Since they all do the same thing, gas just picks the one with the shortest encoding. Follow its lead here. This implements rdar://8208615 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118362 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1465,6 +1465,11 @@ def : InstAlias<"jmpw $seg, $off", (FARJMP16i i16imm:$off, i16imm:$seg)>;
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def : InstAlias<"calll $seg, $off", (FARCALL32i i32imm:$off, i16imm:$seg)>;
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def : InstAlias<"jmpl $seg, $off", (FARJMP32i i32imm:$off, i16imm:$seg)>;
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// Force mov without a suffix with a segment and mem to prefer the 'l' form of
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// the move. All segment/mem forms are equivalent, this has the shortest
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// encoding.
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def : InstAlias<"mov $mem, $seg", (MOV32sm SEGMENT_REG:$seg, i32mem:$mem)>;
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def : InstAlias<"mov $seg, $mem", (MOV32ms i32mem:$mem, SEGMENT_REG:$seg)>;
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// Match 'movq <largeimm>, <reg>' as an alias for movabsq.
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def : InstAlias<"movq $imm, $reg", (MOV64ri GR64:$reg, i64imm:$imm)>;
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@ -873,3 +873,10 @@ decl %eax // CHECK: decl %eax # encoding: [0xff,0xc8]
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// CHECK: sidt 4(%rax)
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// CHECK: encoding: [0x0f,0x01,0x48,0x04]
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sidtq 4(%rax)
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// rdar://8208615
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mov (%rsi), %gs // CHECK: movl (%rsi), %gs # encoding: [0x8e,0x2e]
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mov %gs, (%rsi) // CHECK: movl %gs, (%rsi) # encoding: [0x8c,0x2e]
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