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ARM assembly shifts by zero should be plain 'mov' instructions.

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"mov r1, r2, lsl #0" should assemble as "mov r1, r2" even though it's
not strictly legal UAL syntax. It's a common extension and the friendly
thing to do.

rdar://10604663

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146937 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-12-20 00:59:38 +00:00
parent ea93373a0a
commit 04b5d93250
2 changed files with 34 additions and 0 deletions
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17
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
View File

@ -5945,6 +5945,23 @@ processInstruction(MCInst &Inst,
}
break;
}
case ARM::MOVsi: {
ARM_AM::ShiftOpc SOpc = ARM_AM::getSORegShOp(Inst.getOperand(2).getImm());
if (SOpc == ARM_AM::rrx) return false;
if (ARM_AM::getSORegOffset(Inst.getOperand(2).getImm()) == 0) {
// Shifting by zero is accepted as a vanilla 'MOVr'
MCInst TmpInst;
TmpInst.setOpcode(ARM::MOVr);
TmpInst.addOperand(Inst.getOperand(0));
TmpInst.addOperand(Inst.getOperand(1));
TmpInst.addOperand(Inst.getOperand(3));
TmpInst.addOperand(Inst.getOperand(4));
TmpInst.addOperand(Inst.getOperand(5));
Inst = TmpInst;
return true;
}
return false;
}
case ARM::t2IT: {
// The mask bits for all but the first condition are represented as
// the low bit of the condition code value implies 't'. We currently

17
test/MC/ARM/basic-arm-instructions.s
View File

@ -904,11 +904,28 @@ Lforward:
movs r2, r3
moveq r2, r3
movseq r2, r3
mov r12, r8, lsl #(2 - 2)
lsl r2, r3, #(2 - 2)
mov r12, r8, lsr #(2 - 2)
lsr r2, r3, #(2 - 2)
mov r12, r8, asr #(2 - 2)
asr r2, r3, #(2 - 2)
mov r12, r8, ror #(2 - 2)
ror r2, r3, #(2 - 2)
@ CHECK: mov r2, r3 @ encoding: [0x03,0x20,0xa0,0xe1]
@ CHECK: movs r2, r3 @ encoding: [0x03,0x20,0xb0,0xe1]
@ CHECK: moveq r2, r3 @ encoding: [0x03,0x20,0xa0,0x01]
@ CHECK: movseq r2, r3 @ encoding: [0x03,0x20,0xb0,0x01]
@ CHECK: mov r12, r8 @ encoding: [0x08,0xc0,0xa0,0xe1]
@ CHECK: mov r2, r3 @ encoding: [0x03,0x20,0xa0,0xe1]
@ CHECK: mov r12, r8 @ encoding: [0x08,0xc0,0xa0,0xe1]
@ CHECK: mov r2, r3 @ encoding: [0x03,0x20,0xa0,0xe1]
@ CHECK: mov r12, r8 @ encoding: [0x08,0xc0,0xa0,0xe1]
@ CHECK: mov r2, r3 @ encoding: [0x03,0x20,0xa0,0xe1]
@ CHECK: mov r12, r8 @ encoding: [0x08,0xc0,0xa0,0xe1]
@ CHECK: mov r2, r3 @ encoding: [0x03,0x20,0xa0,0xe1]
@------------------------------------------------------------------------------
@ MOVT