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expand ISD::SHL_PARTS, ISD::SRA_PARTS and ISD::SRL_PARTS
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30987 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -216,8 +216,7 @@ void ARMAsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
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}
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break;
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case MachineOperand::MO_ExternalSymbol:
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assert(0 && "not implemented");
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abort();
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O << TAI->getGlobalPrefix() << MO.getSymbolName();
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break;
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case MachineOperand::MO_ConstantPoolIndex:
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O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
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@ -72,6 +72,10 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
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setOperationAction(ISD::BRCOND, MVT::Other, Expand);
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setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand);
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setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand);
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setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand);
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setOperationAction(ISD::VASTART, MVT::Other, Custom);
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setOperationAction(ISD::VAEND, MVT::Other, Expand);
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@ -321,11 +325,14 @@ static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG) {
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Chain = DAG.getNode(ISD::TokenFactor, MVT::Other,
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&MemOpChains[0], MemOpChains.size());
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// If the callee is a GlobalAddress/ExternalSymbol node (quite common, every
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// direct call is) turn it into a TargetGlobalAddress/TargetExternalSymbol
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// node so that legalize doesn't hack it.
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// If the callee is a GlobalAddress node (quite common, every direct call is)
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// turn it into a TargetGlobalAddress node so that legalize doesn't hack it.
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// Likewise ExternalSymbol -> TargetExternalSymbol.
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assert(Callee.getValueType() == MVT::i32);
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if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee))
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Callee = DAG.getTargetGlobalAddress(G->getGlobal(), Callee.getValueType());
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Callee = DAG.getTargetGlobalAddress(G->getGlobal(), MVT::i32);
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else if (ExternalSymbolSDNode *E = dyn_cast<ExternalSymbolSDNode>(Callee))
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Callee = DAG.getTargetExternalSymbol(E->getSymbol(), MVT::i32);
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// If this is a direct call, pass the chain and the callee.
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assert (Callee.Val);
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@ -128,8 +128,8 @@ let isReturn = 1 in {
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def bx: InstARM<(ops), "bx r14", [(retflag)]>;
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}
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let Defs = [R0, R1, R2, R3, R14] in {
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def bl: InstARM<(ops i32imm:$func, variable_ops), "bl $func", [(ARMcall tglobaladdr:$func)]>;
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let noResults = 1, Defs = [R0, R1, R2, R3, R14] in {
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def bl: InstARM<(ops i32imm:$func, variable_ops), "bl $func", []>;
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}
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def ldr : InstARM<(ops IntRegs:$dst, memri:$addr),
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@ -286,3 +286,9 @@ def FLDS : InstARM<(ops FPRegs:$dst, IntRegs:$addr),
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def FLDD : InstARM<(ops DFPRegs:$dst, IntRegs:$addr),
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"fldd $dst, $addr",
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[(set DFPRegs:$dst, (load IntRegs:$addr))]>;
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def : Pat<(ARMcall tglobaladdr:$dst),
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(bl tglobaladdr:$dst)>;
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def : Pat<(ARMcall texternalsym:$dst),
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(bl texternalsym:$dst)>;
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24
test/CodeGen/ARM/longarith.ll
Normal file
24
test/CodeGen/ARM/longarith.ll
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@ -0,0 +1,24 @@
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; RUN: llvm-as < %s | llc -march=arm &&
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; RUN: llvm-as < %s | llc -march=arm | grep __ashldi3 &&
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; RUN: llvm-as < %s | llc -march=arm | grep __ashrdi3 &&
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; RUN: llvm-as < %s | llc -march=arm | grep __lshrdi3
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uint %f1(ulong %x, ubyte %y) {
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entry:
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%a = shl ulong %x, ubyte %y
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%b = cast ulong %a to uint
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ret uint %b
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}
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uint %f2(long %x, ubyte %y) {
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entry:
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%a = shr long %x, ubyte %y
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%b = cast long %a to uint
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ret uint %b
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}
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uint %f3(ulong %x, ubyte %y) {
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entry:
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%a = shr ulong %x, ubyte %y
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%b = cast ulong %a to uint
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ret uint %b
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}
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